B2

B1

A2

A1

GND

B2

B1

A2

A1

GND

TOP VIEW

BOTTOM VIEW

SVA-30110402

LP5904

SNVS637G – MARCH 2011 – REVISED APRIL 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

CONNECTION DIAGRAMS

Note: The actual physical placement of the package marking will vary from part to part. The package marking “A”

designates the date code, and will vary in production.

Figure 1. 4-Bump Thin DSBGA Package

Package Number YFQ0004AAA

PIN DESCRIPTIONS

PIN

DESCRIPTION

NAME

NO.

A1

VIN

Input voltage supply. A 1.0 µF capacitor should be connected at this input.

Output voltage. A 1.0 µF Low ESR capacitor should be connected to this pin. Connect this output to

A2

VOUT

the load circuit. An internal 280

disabled.

Enable input; disables the regulator when

≤ 0.4V. Enables the regulator when ≥ 1.2V. An internal 1MΩ

B1

VEN

pulldown resistor connects this input to ground.

B2

GND

Common ground.

ORDERING INFORMATION

SUPPLIED AS

OUTPUT VOLTAGE (V)

250 TAPE AND REEL

3000 TAPE AND REEL

1.2

LP5904TME-1.2/NOPB

LP5904TMX-1.2/NOPB

LP5904TME-1.8/NOPB

LP5904TMX-1.8/NOPB

LP5904TME-2.5/NOPB

LP5904TMX-2.5/NOPB

LP5904TME-2.6/NOPB

LP5904TMX-2.6/NOPB

2.8

LP5904TME-2.8/NOPB

LP5904TMX-2.8/NOPB

2.85

LP5904TME-2.85/NOPB

LP5904TMX-2.85/NOPB

LP5904TME-3.0/NOPB

LP5904TMX-3.0/NOPB

3.1

LP5904TME-3.1/NOPB

LP5904TMX-3.1/NOPB

LP5904TME-3.2/NOPB

LP5904TMX-3.2/NOPB

LP5904TME-3.4/NOPB

LP5904TMX-3.4/NOPB

(1)

Contact your local TI Sales Office for availability of other voltage options.

(2)

Not yet released — contact TI sales office for sample availability.

2

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