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LP8550TLX-A/NOPB 数据表(PDF) 16 Page - Texas Instruments

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部件名 LP8550TLX-A/NOPB
功能描述  LP8550 High-Efficiency LED Backlight Driver for Notebooks
PDF  49 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

LP8550TLX-A/NOPB 数据表(HTML) 16 Page - Texas Instruments

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OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
tSHIFT = 1/(FPWM x 6)
Shift time
1/(FPWM)
Cycle time
LP8550
SNVS657E – SEPTEMBER 2010 – REVISED SEPTEMBER 2014
www.ti.com
Table 1. Available PWM Frequencies and Resolutions (continued)
PWM_RES[1:0]
00
01
10
11
PWM_FREQ[4:0]
5 MHz
10 MHz
20 MHz
40 MHz
RESOLUTION (bits)
00101
1728
3456
6912
13823
11
00100
1503
3005
6010
12020
11
00011
1202
2404
4808
9616
12
00010
1052
2104
4207
8414
12
00001
826
1653
3306
6611
12
00000
601
1202
2404
4808
13
RFSET resistance values with corresponding PWM frequencies:
Table 2. PWM Frequency Selection with Resistor
PWM_RES[1:0
00
01
10
11
]
RFSET (k
Ω)
5 MHz CLOCK
RESOLUTION
10 MHz
RESOLUTION
20 MHz
RESOLUTION
40 MHz
RESOLUTION
CLOCK
CLOCK
CLOCK
10...15
19232
8
19232
9
19232
10
19232
11
26...29
16828
8
15927
9
16227
10
17429
11
36...41
14424
8
12771
9
14424
10
15626
11
50...60
12020
8
9616
10
12020
10
12020
11
85...100
9616
9
8715
10
9616
11
9616
12
135...150
7963
9
7813
10
7813
11
8414
12
200...300
6386
9
6311
10
6010
11
6811
12
450...
4808
10
4808
11
4808
12
4808
13
8.3.2.14 Phase Shift PWM (PSPWM) Scheme
Phase shift PWM scheme allows delaying the time when each LED output is active. When the LED output are
not activated simultaneously, the peak load current from the boost output is greatly decreased. This reduces the
ripple seen on the boost output and allows smaller output capacitors. Reduced ripple also reduces the output
ceramic capacitor audible ringing. PSPWM scheme also increases the load frequency seen on boost output by
x6 and therefore transfers the possible audible noise to so high frequency that human ear cannot hear it.
Description of the PSPWM mode is seen in Figure 14. PSPWM mode is enabled by setting <EN_PSPWM>
EEPROM bit to 1. Shift time is the delay between outputs and it is defined as 1 / (fPWM x 6). If the <EN_PSPWM>
bit is 0, then the delay is 0 and all outputs are active simultaneously.
Figure 14. Phase Shift PWM Mode
16
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Copyright © 2010–2014, Texas Instruments Incorporated
Product Folder Links: LP8550



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