2004 July 12

22

Philips Semiconductors

Product specification

IC card interface

TDA8024

Notes

1. All parameters remain within limits but are tested only statistically for the temperature range. When a parameter is

2. If no external bridge is used then, to avoid any disturbance, it is recommended to connect pin 18 to ground. Pin 18

is not connected in the TDA8024AT

ESR both with values of 100 nF, or one 100 nF and one 220 nF (see Fig.13).

4. Permitted capacitor values are 100, or 100 + 100, or 220, or 220 + 100, or 330 nF.

5. Transition time and duty factor definitions are shown in Fig.12;

6. Pin CMDVCC is active LOW; pin RSTIN is active HIGH; for CLKDIV1 and CLKDIV2 functions see Table 1.

7. Pin PRES is active LOW; pin PRES is active HIGH; PRES has an integrated 1.25

µA current source to GND

δ

t

1

t

1

t

2

+

---------------

=

handbook, full pagewidth

MDB058

10%

90%

90%

10%

tr

tf

t1

t2

VOH

VOH + VOL

2

VOL

Fig.12 Definition of output and input transition times.

13 APPLICATION INFORMATION

Performance can be affected by the layout of the

application. For example, an additional cross-capacitance

of 1 pF between card reader contacts C2 and C3 or C2

and C7 can cause contact C2 to be polluted with high

frequency noise from C3 (or C7). In this case, include a

100 pF capacitor between contacts C2 and CGND.

Application recommendations:

• Ensure there is ample ground area around the TDA8024

and the connector; place the TDA8024 very near to the

are best positioned under the connector)

• The TDA8024 and the microcontroller must use the

PRES, PRES, AUX1UC, I/OUC, AUX2UC, 5V/3V,

to be driven by an external clock, also refer this pin to

• Track C3 should be placed as far as possible from the

other tracks

• The track connecting CGND to C5 should be straight

(the two capacitors on C1 should be connected to this

ground track)

• Avoid ground loops between CGND, PGND and GND

are the same in the application, then they should be

connected in star on the main track.

With all these layout precautions, noise should be kept to

an acceptable level and jitter on C3 should be less than

100 ps.

Reference layouts are provided in

“Application

note 10141”, available on request.