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MCP19111-E/MJ 数据表(PDF) 21 Page - Microchip Technology |
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MCP19111-E/MJ 数据表(HTML) 21 Page - Microchip Technology |
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21 / 226 page  2013-2016 Microchip Technology Inc. DS20002331D-page 21 MCP19110/11 3.8.5 OVERTEMPERATURE The MCP19110/11 features a hardware overtemperature shutdown protection typically set at +160°C. No firmware fault-handling procedure is required to shutdown the MCP19110/11 for an overtemperature condition. The ABECON<TMPSEN> bit must be set to enable the over temperature circuitry. 3.9 PIC Microcontroller Core Integrated into the MCP19110/11 is the PIC microcontroller mid-range core. This is a fully functional microcontroller, allowing proprietary features to be implemented. Setting the CONFIG<CP> bit enables the code protection. The firmware is then protected from external reads or writes. Various status and fault bits are available to customize the fault handling response. A minimal amount of firmware is required to properly configure the MCP19110/11. Section 6.0 “Configuring the MCP19110/11” contains detailed information about each register that needs to be set for the MCP19110/11 device to operate. To aid in the development of the required firmware, a Graphical User Interface (GUI) has been developed. This GUI can be used to quickly configure the MCP19110/11 for basic operation. Customized or proprietary features can then be added to the GUI generated firmware. The MCP19110/11 device features firmware debug support. See Section 30.0 “Development Support” for more information. 3.10 Miscellaneous Features 3.10.1 DEVICE ADDRESSING The communication address of the MCP19110/11 is stored in the SSPADD register. This value can be loaded when the device firmware is programmed or configured by external components. By reading a volt- age on a GPIO with the ADC, a device specific address can be stored into the SSPADD register. The MCP19110/11 contains a second address register, SSPADD2. This is a 7-bit address that can be used as the SMBus alert address when PMBus communication is used. See Section 27.0 “Master Synchronous Serial Port (MSSP) Module” for more information. 3.10.2 DEVICE ENABLE A GPIO pin can be configured to be a device enable pin. By configuring the pin as an input, the PORT register or the interrupt on change (IOC) can be used to enable the device. Example 3-2 shows how to configure a GPIO as an enable pin by testing the PORT register. EXAMPLE 3-2: CONFIGURING GPA3 AS DEVICE ENABLE Note 1: The GUI can be found on the MCP19110/11 product page on www.microchip.com. 2: Microchip's MPLAB X Integrated Development Environment Software is required to use the GUI. BANKSEL TRISGPA BSF TRISGPA, 3 ;Set GPA3 as input BANKSEL ANSELA BCF ANSELA, 3 ;Set GPA3 as digital input : : ;Insert additional user code here : WAIT_ENABLE: BANKSEL PORTGPA BTFSS PORTGPA, 3 ;Test GPA3 to see if pulled high ;A high on GPA3 indicated device to be enabled GOTO WAIT_ENABLE ;Stay in loop waiting for device enable BANKSEL ATSTCON BSF ATSTCON, 0 ;Enable the device by enabling drivers : : ;Insert additional code here : |
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