CC2650MODAMOHT datasheet(13/40 Pages) TI1

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CC2650MODA

www.ti.com

SWRS187A – AUGUST 2016 – REVISED AUGUST 2016

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Specifications

(1)

Using IEEE Std 1241™-2010 for terminology and test methods.

(2)

Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.

(3)

No missing codes. Positive DNL typically varies from +0.3 to +3.5 depending on device, see Figure 5-24.

(4)

For a typical example, see Figure 5-25.

(5)

Applied voltage must be within absolute maximum ratings (Section 5.1) at all times.

5.15 ADC Characteristics

Tc = 25°C, VDD = 3.0 V and voltage scaling enabled, unless otherwise noted

(1)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage range

VDD

Resolution

Bits

Sample rate

200

ksps

Offset

Internal 4.3-V equivalent reference(2)

LSB

Gain error

Internal 4.3-V equivalent reference(2)

2.4

LSB

DNL(3)

Differential nonlinearity

>–1

LSB

INL(4)

Integral nonlinearity

±3

LSB

ENOB

Effective number of bits

Internal 4.3-V equivalent reference(2), 200 ksps,

9.6-kHz input tone

9.8

Bits

VDD as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

11.1

THD

Total harmonic

distortion

Internal 4.3-V equivalent reference(2), 200 ksps,

9.6-kHz input tone

–65

VDD as reference, 200 ksps, 9.6-kHz input tone

–69

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

–71

SINAD

and SNDR

Signal-to-noise and

distortion ratio

Internal 4.3-V equivalent reference(2), 200 ksps,

9.6-kHz input tone

VDD as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

SFDR

Spurious-free dynamic

range

Internal 4.3-V equivalent reference(2), 200 ksps,

9.6-kHz input tone

VDD as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled, 32

samples average, 200 ksps, 300-Hz input tone

Conversion time

Serial conversion, time-to-output, 24-MHz clock

clock-

cycles

Current consumption

Internal 4.3-V equivalent reference(2)

0.66

Current consumption

VDD as reference

0.75

Reference voltage

Equivalent fixed internal reference (input voltage

scaling enabled). For best accuracy, the ADC

conversion should be initiated through the TI-RTOS™

API to include the gain or offset compensation factors

stored in FCFG1.

4.3(2)(5)

Reference voltage

Fixed internal reference (input voltage scaling

disabled). For best accuracy, the ADC conversion

should be initiated through the TI-RTOS API to include

the gain or offset compensation factors stored in

FCFG1. This value is derived from the scaled value

(4.3 V) as follows: Vref = 4.3 V × 1408 / 4095

1.48

Reference voltage

VDD as reference (Also known as RELATIVE) (input

voltage scaling enabled)

VDD

Reference voltage

VDD as reference (Also known as RELATIVE) (input

voltage scaling disabled)

VDD / 2.82(5)

Input Impedance

200 ksps, voltage scaling enabled. Capacitive input,

input impedance depends on sampling frequency and

sampling time

MΩ

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