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TPS3780CDBVT 数据表(PDF) 6 Page - Texas Instruments |
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TPS3780CDBVT 数据表(HTML) 6 Page - Texas Instruments |
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6 / 28 page ![]() VHYS OUTx tSD VDD VDD(min) SENSEx V(POR) VIT+ VIT± tPD(r) tPD(f) 570 µs Undefined Undefined 570 µs TPS3779, TPS3780 SBVS250 – APRIL 2015 www.ti.com 7.6 Timing Requirements Typical values are at TJ = 25°C and VDD = 3.3 V. SENSE transitions between 0 V and 1.3 V. MIN NOM MAX UNIT tPD(r) SENSE (rising) to OUT propagation delay 5.5 µs tPD(f) SENSE (falling) to OUT propagation delay 10 µs tSD Startup delay(1) 570 µs (1) During power-on or a VDD transient below VDD(min), the outputs reflect the input conditions 570 µs after VDD transitions through VDD(min). Figure 1. Timing Diagram 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TPS3779 TPS3780 |
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