11-243
RF2948B
Rev A6 040930
Pin
Function
Description
Interface Schematic
1PD
This pin is used to power up or down the transmit and receive base-
band sections. A logic high powers up the quad demod mixers, TX and
RX GmC LPF’s, baseband VGA amps, data amps, and IF LO buffer
amp/ phase splitter. A logic low powers down the entire IC for sleep
mode. Also, see State Decode Table.
2
RX EN
Enable pin for the receiver 15dB gain IF amp and the RX VGA amp.
Powers up all receiver functions when PD is high, turns off the receiver
IF circuits when low. Also, see State Decode Table.
When this pin is a logic “high”, the device is in receive mode. When this
pin is a logic “low”, the device is in transmit mode.
See pin 1.
3
RX IF BIAS
Shunt resistor of 23.7±1% to ground. Biases IF AMPS.
4VCC1
Power supply for RX VGA amplifier, IC logic and RX references.
5
RX IF IN
IF input for receiver section. Must have DC-blocking cap. The capacitor
value should be appropriate for the IF frequency. For half-duplex opera-
tion, connect RX IF IN and TX IF IN signals together after the DC block-
ing caps, then run a transmission line from the output of the IF SAW.
AC coupling capacitor must be less than 150pF to prevent delay in
switching RX to TX/TX to RX.
See pin 6.
6
TX IF IN
Input for the TX IF signal after SAW filter. External DC-blocking cap
required. For half-duplex operation, connect RX IF IN and TX IF IN sig-
nals together after the DC-blocking caps, then run a transmission line
from the output of the IF SAW. AC coupling capacitor must be less than
150pF to prevent delay in switching RX to TX/TX to RX.
7VCC9
Power supply for the TX 15dB gain amp and TX VGA.
8TX VGC
Gain control setting for the transmit VGA. Positive slope.
9
IF LO
IF LO input. Must have DC-blocking cap. The capacitor value should be
appropriate for the IF frequency. LO frequency=2xIF. Quad
mod/demod phase accuracy requires low harmonic content from IF LO,
so it is recommended to use an n=3 LPF between the IF VCO and IF
LO. This is a high impedance input and the recommended matching
approach is to simply add a 100
Ω shunt resistor at this input to con-
strain the mismatch.
10
VCC8
Power supply for IF LO buffer and quadrature phase network.
11
VCC6
Power supply for transmitter bias generator.
12
PA OUT
This is the output transistor of the power amp stage. It is an open col-
lector output. The output match is formed by an inductor to VCC, which
supplies DC and a series cap.
10 k
Ω
ESD
VCC
To
Logic
Pins
3, 4, 5
DC
Block
50
Ω µstrip
IF
SAW
Filter
Pin 7
Pin 8
IF VCO
C2
150 pF
IF LO
Pin 9
Recommended Matching
Network for IF LO
100
Ω
L
From
TX RF
Image Filter
V
CC
C
BYP
22 nF
C
PA OUT
PA IN
Power
Amp
Output
14 mA
Bias
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