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SC7313 数据表(PDF) 7 Page - Silan Microelectronics Joint-stock |
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SC7313 数据表(HTML) 7 Page - Silan Microelectronics Joint-stock |
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7 / 13 page ![]() Silan Semiconductors SC7313 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 7 APPLICATION NOTES 1. I 2C BUS INTERFACE Data transmission from microprocessor to the SC7313 and viceversa takes place through the 2 wires I2CBUS interface, consisting of the two lines SDA and SCL(pull-up resistors to positive supply voltage must be connected). 2. DATA VALIDITY As shown in Figure 17, the data of the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the dtat line can only change when the clock signal on the SCL line is LOW. SDA SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED Fig. 17 Data Validity on the I2CBUS 3. START AND STOP CONDITIONS As shown in Figure 18, a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. // // SCL SDA start stop I2C BUS Fig. 18 Timing diagram of I2CBUS 4. BYTE FORMAT Every byte transferred on the SDA line must obtain 8 bits. Each byte must be followed by the an acknowledge bit. The MSB is transferred first. |
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