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HT24LC08 数据表(PDF) 2 Page - Holtek Semiconductor Inc |
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HT24LC08 数据表(HTML) 2 Page - Holtek Semiconductor Inc |
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2 / 11 page ![]() Absolute Maximum Ratings Operating Temperature (Commercial) ........................................................................................................ 0 °Cto70°C Storage Temperature ............................................................................................................................ -50°Cto125°C Applied VCC Voltage with Respect to VSS ............................................................................................... -0.3V to 6.0V Applied Voltage on any Pin with Respect to VSS ........................................................................................................ -0.3V to VCC+0.3V Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil- ity. D.C. Characteristics Ta=0 °Cto70°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VCC Conditions VCC Operating Voltage ¾¾ 2.2 ¾ 5.5 V ICC1 Operating Current 5V Read at 100kHz ¾¾ 2mA ICC2 Operating Current 5V Write at 100kHz ¾¾ 5mA VIL Input Low Voltage ¾¾ -1 ¾ 0.3VCC V VIH Input High Voltage ¾¾ 0.7VCC ¾ VCC+0.5 V VOL Output Low Voltage 2.4V IOL=2.1mA ¾¾ 0.4 V ILI Input Leakage Current 5V VIN=0 or VCC ¾¾ 1 mA ILO Output Leakage Current 5V VOUT=0 or VCC ¾¾ 1 mA ISTB1 Standby Current 5V VIN=0 or VCC ¾¾ 5 mA ISTB2 Standby Current 2.4V VIN=0 or VCC ¾¾ 4 mA CIN Input Capacitance (See Note) ¾ f=1MHz 25 °C ¾¾ 6pF COUT Output Capacitance (See Note) ¾ f=1MHz 25 °C ¾¾ 8pF Note: These parameters are periodically sampled but not 100% tested A.C. Characteristics Ta=0 °Cto70°C Symbol Parameter Remark Standard Mode* VCC=5V ±10% Unit Min. Max. Min. Max. fSK Clock Frequency ¾¾ 100 ¾ 400 kHz tHIGH Clock High Time ¾ 4000 ¾ 600 ¾ ns tLOW Clock Low Time ¾ 4700 ¾ 1200 ¾ ns tr SDA and SCL Rise Time Note ¾ 1000 ¾ 300 ns tf SDA and SCL Fall Time Note ¾ 300 ¾ 300 ns tHD:STA START Condition Hold Time After this period the first clock pulse is generated 4000 ¾ 600 ¾ ns tSU:STA START Condition Setup Time Only relevant for repeated START condition 4000 ¾ 600 ¾ ns tHD:DAT Data Input Hold Time ¾ 0 ¾ 0 ¾ ns tSU:DAT Data Input Setup Time ¾ 200 ¾ 100 ¾ ns tSU:STO STOP Condition Setup Time ¾ 4000 ¾ 600 ¾ ns HT24LC08 Rev. 1.30 2 November 25, 2003 |
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