Typical Performance

25˚C, C

V

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Application Hints

V

To prevent misoperation, ensure that V

before start-up is initiated. This scenario can occur in sys-

tems with a backup battery using reverse-biased "blocking"

diodes which may allow enough leakage current to flow into

the V

when the main power is removed. Using low leakage diodes

or a resistive pull down can prevent the voltage at V

rising above 50mV. Large bulk capacitors connected to

V

discharge fully before re-start is initiated (but only if V

allowed to fall below 1V). A resistor connected across the

capacitor will allow it to discharge more quickly. It should be

noted that the probability of a "false start" caused by incor-

rect logic states is extremely low.

EXTERNAL CAPACITORS

To assure regulator stability, input and output capacitors are

required as shown in the Typical Application Circuit.

OUTPUT CAPACITOR

At least 4.7µF of output capacitance is required for stability

(the amount of capacitance can be increased without limit).

The output capacitor must be located less than 1 cm from

the output pin of the IC and returned to a clean analog

ground. The ESR (equivalent series resistance) of the output

capacitor must be within the "stable" range as shown in the

graph below over the full operating temperature range for

stable operation.

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Minimum ESR vs Output Load Current

Tantalum capacitors are recommended for the output as

their ESR is ideally suited to the part’s requirements and the

ESR is very stable over temperature. Aluminum electrolytics

are not recommended because their ESR increases very

rapidly at temperatures below 10C. Aluminum caps can only

be used in applications where lower temperature operation

is not required.

A second problem with Al caps is that many have ESR’s

which are only specified at low frequencies. The typical loop

bandwidth of a linear regulator is a few hundred kHz to

several MHz. If an Al cap is used for the output cap, it must

be one whose ESR is specified at a frequency of 100 kHz or

more.

Because the ESR of ceramic capacitors is only a few milli

Ohms, they are not suitable for use as output capacitors on

LP388X devices. The regulator output can tolerate ceramic

capacitance totaling up to 15% of the amount of Tantalum

capacitance connected from the output to ground.

OUTPUT "BYPASS" CAPACITORS

Many designers place small value "bypass" capacitors at

various circuit points to reduce noise. Ceramic capacitors in

the value range of about 1000pF to 0.1µF placed directly on

the output of a PNP or P-FET LDO regulator can cause a

loss of phase margin which can result in oscillations, even

when a Tantalum output capacitor is in parallel with it. This is

not unique to National Semiconductor LDO regulators, it is

true of any P-type LDO regulator.

The reason for this is that PNP or P-FET regulators have a

higher output impedance (compared to an NPN regulator),

which results in a pole-zero pair being formed by every

different capacitor connected to the output.

The zero frequency is approximately:

F

π XESRXC)

Where ESR is the equivalent series resistance of the capaci-

tor, and C is the value of capacitance.

The pole frequency is:

F

π XR

Where R

output.

To understand why a small capacitor can reduce phase

margin: assume a typical LDO with a bandwidth of 1MHz,

which is delivering 0.5A of current from a 2.5V output (which

means R

the output. This creates a pole whose frequency is:

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