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M68AF511A 数据表(PDF) 13 Page - STMicroelectronics

部件名 M68AF511A
功能描述  4 Mbit (512K x8), 5V Asynchronous SRAM
PDF  18 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M68AF511A 数据表(HTML) 13 Page - STMicroelectronics

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M68AF511A
Figure 12. Low VCC Data Retention AC Waveforms.
Table 9. Low VCC Data Retention Characteristics
Note: 1. All other Inputs at VIH ≥ VCC –0.2V or VIL ≤ 0.2V.
2. Tested initially and after any design or process that may affect these parameteres.
tAVAV is Read cycle time.
3. No input may exceed VCC +0.2V.
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
ICCDR
(1)
Supply Current (Data Retention)
VCC = 2V, E ≥ VCC – 0.2V, f = 0
(3)
4.5
9
µA
tCDR
(1,2)
Chip Deselected to Data
Retention Time
0ns
tR
(2)
Operation Recovery Time
tAVAV
ns
VDR
(2)
Supply Voltage (Data Retention)
E
≥ VCC – 0.2V, f = 0
2V
AI05915
DATA RETENTION MODE
tR
5.5V
tCDR
VCC
4.5V
VDR > 2.0V
E
2.2V
E
≥ VDR – 0.2V



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