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MPC8248CZQB 数据表(PDF) 34 Page - Motorola, Inc

部件名 MPC8248CZQB
功能描述  MPC8272 PowerQUICC II Family Hardware Specifications
PDF  56 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MPC8248CZQB 数据表(HTML) 34 Page - Motorola, Inc

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MPC8272 PowerQUICC II™ Family Hardware Specifications
MOTOROLA
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Clock Configuration Modes
Clock Configuration Modes
1110_010
50.0
66.7
5
250.0 333.3
3.5
437.5 583.3
2
125.0 166.7
1110_011
50.0
66.7
5
250.0 333.3
4
500.0 666.6
2
125.0 166.7
1110_100
50.0
66.7
5
250.0 333.3
4
333.3 444.4
3
83.3
111.1
1110_101
50.0
66.7
5
250.0 333.3
4.5
375.0 500.0
3
83.3
111.1
1110_110
50.0
66.7
5
250.0 333.3
5
416.7 555.5
3
83.3
111.1
1110_111
50.0
66.7
5
250.0 333.3
5.5
458.3 611.1
3
83.3
111.1
1100_000
Reserved
1100_001
Reserved
1100_010
Reserved
1 The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency
guarantees the required minimum CPU operating frequency. Minimum CPU frequency is determined by the clock
mode. For modes with a CPU multiplication factor
≤ 3, the minimum CPU frequency is 125 MHz or 150 MHz, as
shown in the table. For modes with a CPU multiplication factor
≥ 3.5, the minimum CPU frequency is 250 MHz.
The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so
that the resulting configuration does not exceed the frequency rating of the user’s device.
2 PCI_MODCK determines the PCI clock frequency range. Refer to Table 18 for lower range configurations.
3 MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the MPC8260 User’s Manual).
MODCK[1-3] = three hardware configuration pins.
4 CPM multiplication factor = CPM clock/bus clock
5 CPU multiplication factor = Core PLL multiplication factor
Table 18. Clock Configurations for PCI Agent Mode (PCI_MODCK=1) 1, 2
Mode 3
PCI Clock
(MHz)
CPM
Multiplication
Factor 4
CPM Clock
(MHz)
CPU
Multiplication
Factor 5
CPU Clock
(MHz)
Bus
Division
Factor
Bus Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
Default Modes (MODCK_H=0000)
0000_000
25.0
50.0
4
100.0 200.0
2.5
125.0 250.0
2
50.0
100.0
0000_001
25.0
50.0
4
100.0 200.0
3
150.0 300.0
2
50.0
100.0
0000_010
25.0
50.0
6
150.0 300.0
3
150.0 300.0
3
50.0
100.0
0000_011
31.3
50.0
6
187.5 300.0
4
250.0 400.0
3
62.5
100.0
0000_100
25.0
50.0
6
150.0 300.0
3
180.0 360.0
2.5
60.0
120.0
0000_101
29.8
50.0
6
178.6 300.0
3.5
250.0 420.0
2.5
71.4
120.0
Table 17. Clock Configurations for PCI Agent Mode (PCI_MODCK=0) 1, 2 (continued)
Mode 3
PCI Clock
(MHz)
CPM
Multiplication
Factor 4
CPM Clock
(MHz)
CPU
Multiplication
Factor 5
CPU Clock
(MHz)
Bus
Division
Factor
Bus Clock
(MHz)
MODCK_H-
MODCK[1-3]
Low
High
Low
High
Low
High
Low
High
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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