SN74LVC1G10DBVR datasheet(1/11 Pages) TI

部件名	SN74LVC1G10DBVR

功能描述	SINGLE 3 INPUT POSITIVE NAND GATE

PDF	11 Pages

Scroll/Zoom	100%

制造商	TI [Texas Instruments]

网页	http://www.ti.com

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1 / 11 page

SN74LVC1G10

SINGLE 3INPUT POSITIVENAND GATE

SCES486B − SEPTEMBER 2003 − REVISED FEBRUARY 2004

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D Available in the Texas Instruments

NanoStar

 and NanoFree Packages

D Supports 5-V VCC Operation

D Inputs Accept Voltages to 5.5 V

D Max tpd of 3.8 ns at 3.3 V

D Low Power Consumption, 10-µA Max ICC

D ±24-mA Output Drive at 3.3 V

D Ioff Supports Partial-Power-Down Mode

Operation

D Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

D ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

description/ordering information

The SN74LVC1G10 performs the Boolean function Y = A

• B • C or Y = A + B + C in positive logic.

NanoStar

 and NanoFree package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING‡

NanoStar

 − WCSP (DSBGA)

0.23-mm Large Bump − YEP

Tape and reel

SN74LVC1G10YEPR

_ _ _C2_

−40

°C to 85°C

NanoFree

 − WCSP (DSBGA)

0.23-mm Large Bump − YZP (Pb-free)

Tape and reel

SN74LVC1G10YZPR

_ _ _C2_

SOT (SOT-23) − DBV

Tape and reel

SN74LVC1G10DBVR

C10_

SOT (SC-70) − DCK

Tape and reel

SN74LVC1G10DCKR

C2_

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one

following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition

(1 = SnPb,

• = Pb-free).

Copyright

 2004, Texas Instruments Incorporated

NanoStar and NanoFree are trademarks of Texas Instruments.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DBV OR DCK PACKAGE

(TOP VIEW)

1

2

3

6

5

4

A

GND

B

C

VCC

Y

3

2

1

4

5

6

B

GND

A

Y

VCC

C

YEP OR YZP PACKAGE

(BOTTOM VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

类似零件编号 - SN74LVC1G10DBVR

制造商	部件名	数据表	功能描述
Texas Instruments	SN74LVC1G10DBVR	675Kb / 15P	SINGLE 3-INPUT POSITIVE-NAND GATE
	SN74LVC1G10DBVR	1Mb / 25P	Single 3-Input Positive-NAND Gate
	SN74LVC1G10DBVR	1Mb / 29P	Single 3-Input Positive-NAND Gate REVISED DECEMBER 2013
TECH PUBLIC Electronics...	SN74LVC1G10DBVR	2Mb / 5P	SINGLE 3-INPUT POSITIVE-NAND GATE
Texas Instruments	SN74LVC1G10DBVR.B	1Mb / 29P	Single 3-Input Positive-NAND Gate REVISED DECEMBER 2013

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类似说明 - SN74LVC1G10DBVR

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