Electrical Characteristics

The following specifcations apply for −V

R

Parameter

Conditions

LF198A

LF398A

Units

Min

Typ

Max

Min

Typ

Max

Input Impedance

T

10

10

10

10

Ω

Gain Error

T

0.002

0.005

0.004

0.005

%

Full Temperature Range

0.01

0.01

%

Feedthrough Attenuation Ratio

T

86

96

86

90

dB

at 1 kHz

Output Impedance

T

0.5

1

0.5

1

Ω

Full Temperature Range

4

6

Ω

“HOLD” Step, (Note 6)

T

0.5

1

1.0

1

mV

Supply Current, (Note 5)

T

4.5

5.5

4.5

6.5

mA

Logic and Logic Reference Input

T

2

10

2

10

µA

Current

Leakage Current into Hold

T

30

100

30

100

pA

Capacitor (Note 5)

Hold Mode

Acquisition Time to 0.1%

∆V

4

6

4

6

µs

C

20

25

20

25

µs

Hold Capacitor Charging Current

V

5

5

mA

Supply Voltage Rejection Ratio

V

90

110

90

110

dB

Differential Logic Threshold

T

0.8

1.4

2.4

0.8

1.4

2.4

V

Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional, but do not guarantee specific performance limits.

Note 3: Although the differential voltage may not exceed the limits given, the common-mode voltage on the logic pins may be equal to the supply voltages without

causing damage to the circuit. For proper logic operation, however, one of the logic pins must always be at least 2V below the positive supply and 3V above the nega-

tive supply.

Note 4: See AN-450 “Surface Mounting Methods and their effects on Product Reliability” for other methods of soldering surface mount devices.

Note 6: Hold step is sensitive to stray capacitive coupling between input logic signals and the hold capacitor. 1 pF, for instance, will create an additional 0.5 mV step

with a 5V logic swing and a 0.01µF hold capacitor. Magnitude of the hold step is inversely proportional to hold capacitor value.

Note 7: Leakage current is measured at a junction temperature of 25˚C. The effects of junction temperature rise due to power dissipation or elevated ambient can

be calculated by doubling the 25˚C value for each 11˚C increase in chip temperature. Leakage is guaranteed over full input signal range.

Note 8: A military RETS electrical test specification is available on request. The LF198 may also be procured to Standard Military Drawing #5962-8760801GA or to

MIL-STD-38510 part ID JM38510/12501SGA.

Typical Performance Characteristics

Note 9: See Definition of Terms

Aperture Time

(Note 9)

DS005692-17

Dielectric Absorption

Error in Hold Capacitor

DS005692-18

Dynamic Sampling Error

DS005692-19

www.national.com

3