STV224X datasheet(56/86 Pages) STMICROELECTRONICS

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STV224XH/228XH/223XH - I²C BUS SELECTION

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6.5 POWER-ON RESET - INITIAL BUS REGISTER CONDITIONS

Power-On Reset is active when the power supply VCCD is below 3 Volts.

All data from all registers must be written by microprocessor after power-on. Unused data must be set to

0. POR values are not tested during production.

Reg.

Addr.

(Hex)

Initial Data Value

Comments

d7 d6 d5 d4 d3 d2 d1 d0

PIFVCO free running fine adjustment Typical.

000

PIFVCO coarse typ, BG = 38.9 MHz, Negative modulation, AFC active,

no PIF over-modulation regulation.

CVBS amplitude Typical, 2VPP.

Tuner AGC starting point Typical, Tuner AGC gain Min.

000

FM/AM out selected, FM de-emphasis and FM deviation auto-control, FM demod.

active, FM out selected, QSS and AM demod. active.

Volume control attenuation at maximum, linear curve (dB).

000

PIF < 42 MHz, 6.5 MHz sound carrier selected, auto AGC SIF time constant, saw

filter switch control at low level, CVBS out enabled, QSS mode.

Contrast at middle, blue screen disabled.

Saturation at middle, half contrast disabled, oversize blanking disabled.

Brightness at middle, RGB Blanking not active.

Red drive at middle, RGBext insertion enabled (FBext Pin control).

Green drive at middle, black stretch disabled, black stretch ref 0IRE.

Blue drive at middle, cut-off loop active.

Red cut-off at middle, automatic cut-off loop.

100

0Green cut-off at middle.

001

Peaking on luma at middle, coring off, trap ON (CVBS & color identified), CVBS2

ON, white insertion not active.

APR disabled, APR threshold at middle, RGB OSD contrast disabled.

000

No shift of bell filter center frequency, 0dB P/N demod. gain, 90° matrix selection,

ACC overload ON.

000

No shift of bandpass center frequency, chroma reference output off, chroma delay

line on.

Two crystals application P/S/N, PAL XTAL1 forced mode, two crystal applications.

Hue at middle, flesh disabled, normal flesh characteristic.

000

CVBS1 selected on main CVBS output, CVBS1 selected on second CVBS output,

CVBS mode.

Horizontal shift at middle, horizontal output enabled, interlace mode.

Vertical amplitude at middle, auto 50/60 Hz identification.

001

Vertical position at middle, automatic time constant selection on PLL1, PLL1 active,

Vertical synchronization active.

000

0.1 V low level at pin VERT, frame blanking adapted to standard, noise detector low

threshold.

Not active, auto cut-off.

R-Y output at pin 29 (SDIP56)

Not to be used, except d4: Auto. SIF AGC time constant control in L/L’ standards.

VERT pulse active, standard luma delay, AVL off, AM/FM mono sound selected.

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