1°C Triple Temperature Sensor with Resistance Error Correction & Hotter of Two Zones

Datasheet

SMSC EMC1053

23

Revision 1.44 (04-14-08)

DATASHEET

APPLICATION NOTE: When measuring a 65nm Intel CPUs, the Ideality Setting should be the default 12h. When

measuring 45nm Intel CPUs, the Ideality Setting should be 15h.

4.8

Beta Configuration Registers (29h - 2Ah)

By default, the beta compensation circuitry is disabled and the EMC1053 is configured to measure

discrete diode-connected transistors. Writing to the Beta Configuration Registers will enable the beta

compensation circuitry and should be used if measuring a CPU substrate diode.

The beta compensation circuit is able to compensate for beta variation within a given range. The beta

configuration register is configured to the proper range to match the CPU to be monitored. The beta

values should be set so that the minimum expected beta is not below the threshold indicated in

Table 4.11. Beta compensation is activated if the BETA<2:0> bits are set to any value other than 07h.

010001

0.9986

100001

1.0200

110001

1.0408

010010

1.0000

100010

1.0213

010011

1.0013

100011

1.0226

010100

1.0026

100100

1.0239

010101

1.0039

100101

1.0252

010110

1.0053

100110

1.0265

010111

1.0066

100111

1.0278

Table 4.10 Beta Configuration Registers

ADDR

REGISTER

B7

B6

B5

B4

B3

B2

B1

B0

DEFAULT

29h

Diode 1 Beta

Configuration

-

-

-

-

-

BETA<2:0>

07h

2Ah

Diode 2 Beta

Configuration

-

-

-

-

-

BETA<2:0>

07h

Table 4.11 Beta Configuration Look Up Table

BETA<2:0>

MINIMUM BETA

21

0

00

0

0.11

00

1

0.18

01

0

0.25

0

1

1

0.33

10

0

0.43

10

1

1.00

Table 4.9 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued)

SETTING

FACTOR

SETTING

FACTOR

SETTING

FACTOR