Philips Semiconductors

LPC2194

Single-chip 16/32-bit microcontrollers

Preliminary data

Rev. 01 — 06 February 2004

21 of 33

9397 750 12757

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

flexibility in the trade-off between resolution and repetition rate. All PWM outputs

will occur at the same repetition rate.

going or negative going pulses.

of erroneous pulses. Software must ‘release’ new match values before they can

become effective.

6.20 System control

6.20.1

Crystal oscillator

The oscillator supports crystals in the range of 1 MHz to 30 MHz. The oscillator

the PLL is running and connected. Refer to Section 6.20.2 “PLL” for additional

information.

6.20.2

PLL

The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The

input frequency is multiplied up into the range of 10 MHz to 60 MHz with a Current

Controlled Oscillator (CCO). The multiplier can be an integer value from 1 to 32 (in

practice, the multiplier value cannot be higher than 6 on this family of microcontrollers

due to the upper frequency limit of the CPU). The CCO operates in the range of

156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO

within its frequency range while the PLL is providing the desired output frequency.

The output divider may be set to divide by 2, 4, 8, or 16 to produce the output clock.

Since the minimum output divider value is 2, it is insured that the PLL output has a

50% duty cycle.The PLL is turned off and bypassed following a chip Reset and may

be enabled by software. The program must configure and activate the PLL, wait for

the PLL to Lock, then connect to the PLL as a clock source.

6.20.3

Reset and wake-up timer

Reset has two sources on the LPC2194: the RESET pin and Watchdog Reset. The

RESET pin is a Schmitt trigger input pin with an additional glitch filter. Assertion of

chip Reset by any source starts the Wake-up Timer (see Wake-up Timer description

below), causing the internal chip reset to remain asserted until the external Reset is

de-asserted, the oscillator is running, a fixed number of clocks have passed, and the

on-chip Flash controller has completed its initialization.

When the internal Reset is removed, the processor begins executing at address 0,

which is the Reset vector. At that point, all of the processor and peripheral registers

have been initialized to predetermined values.