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July 2001

s

HIGH SPEED :

s

LOW POWER DISSIPATION:

s

HIGH NOISE IMMUNITY:

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

WIDE OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 165

DESCRIPTION

The M74HC165 is an high speed CMOS 8 BIT

PISO SHIFT REGISTER fabricated with silicon

This device contains eight clocked master slave

RS flip-flops connected as a shift register, with

auxiliary

gating

to

provide

over-riding

asynchronous parallel entry. Parallel data enters

when the shift/load input is low. The parallel data

can change while shift/load is low, provided that

the recommended set-up and hold times are

observed. For clocked operation, shift/load must

be high. The two clock input perform identically;

one can be used as a clock inhibit by applying a

high signal; to permit this operation clocking is

accomplished through a 2 input nor gate.

To avoid double clocking, however, the inhibit

signal should only go high while the clock is high.

Otherwise the rising inhibit signal will cause the

same response as rising clock edge.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

M74HC165

8 BIT PISO SHIFT REGISTER

PIN CONNECTION AND IEC LOGIC SYMBOLS

ORDER CODES

PACKAGE

TUBE

T & R

DIP

M74HC165B1R

SOP

M74HC165M1R

M74HC165RM13TR

TSSOP

M74HC165TTR

TSSOP

DIP

SOP