LM1237AAFSLASHNA datasheet(10/42 Pages) NSC

10 / 42 page

Pin Descriptions and Application Information (Continued)

No.

Pin Name

Schematic

Description

PLL Filter

Recommended topology and values are shown

to the left. It is recommended that both filter

branches be bypassed to the independent

ground as close to pin 8 as possible. Great care

should be taken to prevent external signals from

coupling into this filter from video, I

2C, etc.

SDA

The I

2C compatible data line. A pull-up resistor

of about 2 Kohms should be connected between

this pin and V

CC. A resistor of at least 100

Ω

should be connected in series with the data line

for additional ESD protection.

SCL

The I

2C compatible clock line. A pull-up resistor

of about 2 k

Ω should be connected between this

pin and V

CC. A resistor of at least 100

Ω should

be connected in series with the clock line for

additional ESD protection.

DAC 4 Output

DAC 2 Output

DAC 3 Output

DAC 1 Output

DAC outputs for cathode cut-off adjustments and

brightness control. DAC 4 can be set to change

the outputs of the other three DACs, acting as a

brightness control. The DAC values and the

special DAC 4 function are set through the I

compatible bus. A resistor of at least 100

Ω

should be connected in series with these outputs

for additional ESD protection.

Ground

Ground pin for the output analog portion of the

LM1237 circuitry, and power supply pin for both

analog and digital sections of the LM1237. Note

the recommended charge storage and high

frequency capacitors which should be as close

to pins 17 and 18 as possible.

Green Output

Red Output

Blue Output

These are the three video output pins. They are

intended to drive the LM246x family of cathode

drivers. Nominally, about 2V peak to peak will

produce 40V peak to peak of cathode drive.

LM1237AAF/NA 数据表(PDF) 10 Page - National Semiconductor (TI)

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