CH1_EQ1

CH1_EQ2

SLP_S0#

RX1P

RX1N

TX1N

TX1P

50

50

Vterm

VCC

GND

RX

TX

TXEN1

IDLE1

RXDET1

LOS

Rx

Detect

LOSZ1

RXTERM_EN

Digital FSM

RX2P

TX2N

TX2P

50

50

Vterm

RX

TX

VIterm

TXEN2

IDLE2

RXDET2

LOS

Rx

Detect

LOSZ2

RXTERM_EN

EN

CH2_EQ1

VCC

Power

Management

2.5V

3.3V (+/-10%)

400K

PG

LFPS

LFPS2

LFPS

LFPS1

MODE

CFG1

RSVD1

LFPS1

LOSZ1

LFPS2

LOSZ2

1.2V

CFG2

CH2_EQ2

RX2N

Copyright © 2016, Texas Instruments Incorporated

13

TUSB1002

www.ti.com

SLLSEU4A – MAY 2016 – REVISED MAY 2016

Product Folder Links: TUSB1002

Submit Documentation Feedback

Copyright © 2016, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TUSB1002 is the industry’s first, dual lane USB 3.1 SuperSpeedPlus redriver. As signals traverse through a

channel (like FR4 trace) the amplitude of the signal is attenuated. The attenuation varies depending on the

frequency content of the signal. Depending the length of the channel this attenuation could be large enough

resulting in signal integrity issues at a USB 3.1 receiver. By placing a TUSB1002 between USB3.1 host and

device the attenuation effect of the channel can eliminated or minimized. The result is a USB3.1 compatible eye

at the devices receiver. With up to 14 receiver equalization settings, the TUSB1002 can support many different

channel loss combinations. The TUSB1002 offers low power consumption on a single 3.3 V supply with its ultra

low power architecture. It supports the USB3.1 low power modes which further reduces idle power consumption.

The TUSB1002 settings are configured through pins. In addition to equalization adjustment, the TUSB1002

provides knobs for adjusting DC gain and voltage output linearity range.

7.2 Functional Block Diagram