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TUSB1002RGET 数据表(PDF) 18 Page - Texas Instruments

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部件名 TUSB1002RGET
功能描述  USB3.1 10 Gbps Dual-Channel Linear Redriver
PDF  28 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TUSB1002RGET 数据表(HTML) 18 Page - Texas Instruments

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A
B
C
D
FR4 Trace
of Length Y
FR4 Trace
of Length X
C
USB 3.1
Host
RXP1
TUSB1002
RXN1
+
-
TXP2
TXN2
+
-
+
-
TXP1
TXN1
+
-
+
-
RXP2
RXN2
+
-
Upstream
C
C
C
C
C
Downstream
Copyright © 2016, Texas Instruments Incorporated
18
TUSB1002
SLLSEU4A – MAY 2016 – REVISED MAY 2016
www.ti.com
Product Folder Links: TUSB1002
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TUSB1002 is a linear redriver designed specifically to compensation for ISI jitter caused by attenuation
through a passive medium like traces and cables. Because the TUSB1002 has two independent channels, it can
be optimized to correct ISI in both the upstream and downstream direction through 14 different equalization
choices. Placing the TUSB1002 between a USB3.1 Host/device controller and a USB3.1 receptacle can correct
signal integrity issues resulting in a more robust system.
8.2 Typical Application
Figure 17. TUSB1002 in USB3.1 Host Application
8.2.1 Design Requirements
Fro this design example , use the parameters shown in Figure 20.
Table 4. Design Parameters
PARAMETER
VALUE
VCC supply (3 V to 3.6 V)
3.3 V
Mode of Operation (Dual or Half Channel)
MODE = F (Floating) for USB3.1 Dual Channel
A/C coupling Capacitor (75 nF to 265 nF)
100 nF
A to B FR4 Length (inches)
8
A to B FR4 Trace Width (mils)
4
C to D FR4 length (inches)
2
C to D FR4 Trace Width (mils)
4
USB3.1 Host Sleep GPIO Support
No (SLP_S0# pin floating)
DC Gain (-2, -1, 0, +1, +2)
0 dB (CFG[2:1] pins floating)
Linear Range (900 mV, 1000 mV, or 1200 mV)
1200 mV (CFG[2:1] pins floating)



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