ADT7461AARMZ-R datasheet(4/19 Pages) ONSEMI

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ADT7461A

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Table 5. ELECTRICAL CHARACTERISTICS (TA = −40°C to +125°C, VDD = 3.0 V to 3.6 V, unless otherwise noted.)

Parameter

Conditions

Min

Typ

Max

Unit

Power Supply

Supply Voltage, VDD

3.0

3.30

3.6

Average Operating Supply Current, IDD

0.0625 Conversions/Sec Rate (Note 1)

Standby Mode

−

240

5.0

350

Undervoltage Lockout Threshold

VDD Input, Disables ADC, Rising Edge

−

2.55

−

Power-On-Reset Threshold

1.0

−

2.5

Temperature-To-Digital Converter

Local Sensor Accuracy

0°C ≤ TA ≤ +70°C

0°C ≤ TA ≤ +85°C

−40°C ≤ TA ≤ +100°C

−

±1.0

±1.5

±2.5

°C

Resolution

−

1.0

−

°C

Remote Diode Sensor Accuracy

0°C ≤ TA ≤ +70°C, −55°C ≤ TD (Note 2) ≤ +150°C

0°C ≤ TA ≤ +85°C, −55°C ≤ TD (Note 2) ≤ +150°C

−40°C ≤ TA ≤ +100°C, −55°C ≤ TD (Note 2) ≤ +150°C

−

±1.0

±1.5

±2.5

°C

Resolution

−

0.25

−

°C

Remote Sensor Source Current

High Level (Note 3)

Middle Level (Note 3)

Low Level (Note 3)

−

220

13.5

−

Conversion Time

From Stop Bit to Conversion Complete, One-shot

Mode with Averaging Switched On

−

One-shot Mode with Averaging Off (That Is,

Conversion Rate = 16-, 32-, or 64-conversions per

Second)

−

6.0

8.0

Maximum Series Resistance Cancelled

Resistance Split Evenly on Both the D+ and D–

Inputs

−

1.5

−

Open-Drain Digital Outputs (THERM, ALERT/THERM2)

Output Low Voltage, VOL

IOUT = −6.0 mA

−

0.4

High Level Output Leakage Current, IOH

VOUT = VDD

−

0.1

1.0

SMBus Interface (Note 3 and 4)

Logic Input High Voltage, VIH SCLK, SDATA

3.0 V ≤ VDD ≤ 3.6 V

2.1

−

Logic Input Low Voltage, VIL SCLK, SDATA

3.0 V ≤ VDD ≤ 3.6 V

−

0.8

Hysteresis

−

500

−

SDA Output Low Voltage, VOL

−

0.4

Logic Input Current, IIH, IIL

−1.0

−

+1.0

SMBus Input Capacitance, SCLK, SDATA

−

5.0

−

SMBus Clock Frequency

−

400

kHz

SMBus Timeout (Note 5)

User Programmable

−

SCLK Falling Edge to SDATA Valid Time

Master Clocking in Data

−

1.0

1. See Table 10 for information on other conversion rates.

2. Guaranteed by characterization, but not production tested.

3. Guaranteed by design, but not production tested.

4. See SMBus Timing Specifications section for more information.

5. Disabled by default. Detailed procedures to enable it are in the Serial Bus Interface section of the datasheet.

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