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TSC2000IPWR 数据表(PDF) 14 Page - Texas Instruments

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部件名 TSC2000IPWR
功能描述  PDA ANALOG INTERFACE CIRCUIT
PDF  34 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TSC2000IPWR 数据表(HTML) 14 Page - Texas Instruments

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14
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TSC2000
SBAS257
RESET
ADDR
REGISTER
VALUE
PAGE
(HEX)
NAME
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
(HEX)
0
00
X
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
01
Y
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
002
Z1
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
003
Z2
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
04
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000
0
05
BAT1
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
06
BAT2
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
07
AUX1
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
08
AUX2
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
09
TEMP1
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
0A
TEMP2
0
0
0
0
R11
R10
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
0000
0
0B
DAC
X
X
X
X
X
X
X
X
D7
D6
D5
D4
D3
D2
D1
D0
007F
0
0C
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
0D
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
0E
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
0F
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
10
ZERO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000
0
11
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
12
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
13
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
14
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
15
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
16
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
17
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
18
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
19
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1A
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1B
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1C
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1D
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1E
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
0
1F
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
00
ADC
PSM
STS
AD3
AD2
AD1
AD0
RS1
RS0
AV1
AV0
CL1
CL0
PV2
PV1
PV0
x
4000
1
01
Reserved
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4000
1
02
DACCTL
DPD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8000
1
03
REF
X
X
X
X
X
X
X
X
X
X
X
INT
DL1
DL0
PND
RFV
0002
1
04
RESET
1
0
1
1
1
0
1
1
X
X
X
X
X
X
X
X
FFFF
1
05
CONFIG
1
1
1
1
1
1
1
1
1
1
PR2
PR1
PR0
SN2
SN1
SN0
FFC0
1
06
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
07
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
08
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
09
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0A
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0B
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0C
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0D
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0E
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
0F
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
10
Reserved
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0000
1
11
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
12
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
13
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
14
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
15
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
16
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
17
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
18
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
19
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1A
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1B
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1C
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1D
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1E
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
1
1F
Reserved
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
FFFF
NOTE: X = Don’t Care.
TABLE IV. Register Summary for TSC2000.
TSC2000 CONTROL REGISTERS
This section will describe each of the registers that were
shown in the memory map of Table III. The registers are
grouped according to the function they control. Note that in
the TSC2000, bits in control registers may refer to slightly
different functions depending upon if you are reading the
register or writing to it. A summary of all registers and bit
locations is shown in Table IV.



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