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P89LPC930FDH 数据表(PDF) 49 Page - NXP Semiconductors |
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P89LPC930FDH 数据表(HTML) 49 Page - NXP Semiconductors |
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49 / 55 page  Philips Semiconductors P89LPC930/931 8-bit microcontrollers with two-clock 80C51 core Product data Rev. 05 — 15 December 2004 49 of 55 9397 750 14472 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Fig 16. SPI master timing (CPHA = 1). tCLCL tSPICLKL tSPICLKH Master LSB/MSB out Master MSB/LSB out tSPIDH tSPIDSU tSPICLKH tSPICLKL tSPIF tSPIOH tSPIDV tSPIDV tSPIR tSPIDV tSPIF tSPIR tSPIF tSPIR SS SPICLK (CPOL = 0) (output) 002aaa157 SPICLK (CPOL = 1) (output) MISO (input) MOSI (output) LSB/MSB in MSB/LSB in Fig 17. SPI slave timing (CPHA = 0). tCLCL tSPICLKH tSPICLKL tSPILEAD tSPICLKH tSPICLKL tSPILAG tSPIDSU tSPIDH tSPIDH tSPIDSU tSPIDSU tSPIR tSPIA tSPIOH tSPIOH tSPIDIS tSPIR Slave MSB/LSB out MSB/LSB in LSB/MSB in Slave LSB/MSB out tSPIDV tSPIOH tSPIDV tSPIR tSPIF tSPIR tSPIF SS SPICLK (CPOL = 0) (input) 002aaa158 SPICLK (CPOL = 1) (input) MISO (output) MOSI (input) Not defined |
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