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MCP39F521 数据表(PDF) 39 Page - Microchip Technology |
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MCP39F521 数据表(HTML) 39 Page - Microchip Technology |
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39 / 52 page ![]() 2015 Microchip Technology Inc. DS20005442A-page 39 MCP39F521 By using Equation 8-2, the calculation for GainNEW yields: EQUATION 8-2: When using the Auto-Calibration Gain command, the result would be a failed calibration or a NAK returned form the MCP39F521, because the resulting GainNEW is less than 25,000. The solution is to use the Range register to bring the measured value closer to the expected value, such that a new gain value can be calculated within the limits specified above. The Range register specifies the number of right-bit shifts (equivalent to divisions by 2) after the multiplication with the Gain Current RMS register. Refer to Section 5.0, Calculation Engine (CE) Description for information on the Range register. Incrementing the Range register by 1 unit, an additional right-bit shift or ÷2 is included in the calculation. Increasing the current range from 12 to 13 yields the new measured Current RMS register value of 2300/2 = 1150. The expected (1000) and measured (1150) are much closer now, so the expected new gain should be within the limits: EQUATION 8-3: The resulting new gain is within the limits and the device successfully calibrates Current RMS and returns an ACK. It can be observed that the range can be set to 14 and the resulting new gain will still be within limits (GainNEW = 58226). However, since this gain value is close to the limit of the 16-bit Gain register, variations from system to system (component tolerances, etc.) might create a scenario where the calibration is not successful on some units and there would be a yield issue. The best approach is to choose a range value that places the new gain in the middle of the bounds of the gain registers described above. In a second example, when applying 1A, the user expects an output of 1.0000A with 0.1 mA resolution. The example is starting with the same initial values: EQUATION 8-4: The GainNEW is much larger than the 16-bit limit of 65535, so fewer right-bit shifts must be introduced to get the measured value closer to the expected value. The user needs to compute the number of bit shifts that will give a value lower than 65535. To estimate this number: EQUATION 8-5: 2.2 rounds to the closest integer value of 2. The range value changes to 12 – 2 = 10; there are 2 less right-bit shifts. The new measured value will be 2300 x 22 = 9200. EQUATION 8-6: The resulting new gain is within the limits and the device successfully calibrates Current RMS and returns an ACK. 8.4 Calibrating the Phase Compensation Register Phase compensation is provided to adjust for any phase delay between the current and voltage path. This procedure requires sinusoidal current and voltage waveforms, with a significant phase shift between them, and significant amplitudes. The recommended displacement power factor for calibration is 0.5. The procedure for calculating the phase compensation register is as follows: 1. Determine what the difference is between the angle corresponding to the measured power factor (PFMEAS) and the angle corresponding to the expected power factor (PFEXP), in degrees. EQUATION 8-7: 2. Convert this from degrees to the resolution provided in Equation 8-8: EQUATION 8-8: GAIN NEW GAIN OLD Expected Measured --------------------------- 33480 1000 2300 ------------ 14556 = = = 14556 25 000 GAIN NEW GAIN OLD Expected Measured --------------------------- 33480 1000 1150 ------------ 29113 = = = 25 000 29113 65535 GAIN NEW GAIN OLD Expected Measured --------------------------- 33480 10000 2300 --------------- 145565 = = = 145565 65535 145565 65535 ------------------2.2 = GAIN NEW GAIN OLD Expected Measured --------------------------- 33480 10000 9200 --------------- 36391 = = = 25 000 36391 65535 PF MEAS Value in PowerFactor Register 32768 --------------------------------------------------------------------------- = ANGLE MEAS PF MEAS 180 --------- acos = ANGLE EXP PF EXP 180 --------- acos = ANGLE MEAS ANGLE EXP – 40 = |
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