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MCP39F511 数据表(PDF) 39 Page - Microchip Technology |
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MCP39F511 数据表(HTML) 39 Page - Microchip Technology |
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39 / 62 page ![]() 2015 Microchip Technology Inc. DS20005393B-page 39 MCP39F511 7.0 EVENT OUTPUT PINS/EVENT CONFIGURATION REGISTER 7.1 Event Pins The MCP39F511 device has two event pins that can be configured in three possible configurations. These configurations are: 1. No event is mapped to the pin 2. Voltage Surge, Voltage Sag, Overcurrent, Over- temperature or Overpower event is mapped to the pin. More than one event can be mapped to the same pin. 3. Manual control of two pins, independently These three configurations allow for the control of external interrupts or hardware that is dependent on the measured power, current or voltage. The Event Configuration Register below describes how these events and pins can be configured. Note: If an event is mapped to a pin, manual control of the respective pin is not possible. To enable manual control, no event has to be mapped to the pin. 7.2 Limits There are five limit registers associated with these events: • Overtemperature limit. The overtemperature event is only available on system versions 0xFA14 and later. • Voltage Sag limit • Voltage Surge limit • Overcurrent limit •Overpower limit Each of these limits are compared to the respective output registers of voltage, current and power. It is recommended that they have the same unit for comparison, e.g. 0.1V, or 0.01W. 7.2.1 OVERTEMPERATURE LIMIT The Overtemperature Limit register is compared to the 10-bit SAR output (analog input voltage register) and is a number between 0 and 1023. When the threshold has been passed the corresponding event flags and event pins (if mapped) will be set. 7.2.2 VOLTAGE SAG AND VOLTAGE SURGE DETECTION The event alarms for Voltage Sag and Voltage Surge work differently compared to the Overcurrent and Over- power events, which are tested against every computa- tion cycle. These two event alarms are designed to provide a much faster interrupt if the condition occurs. Note that neither of these two events have a respective Hold register associated with them, since the detection time is less than one line cycle. The calculation engine keeps track of a trailing mean square of the input voltage, as defined by the following equation: EQUATION 7-1: Therefore, at each data-ready occurrence, the value of VSA is compared to the programmable threshold set in the Voltage Sag Limit register and Voltage Surge Limit register to determine if a flag should be set. If either of these events are masked to either the Event1 or Event2 pin, a logic-high interrupt will be given on these pins. The Sag or Surge events can be used to quickly determine if a power failure has occurred in the system. V SA 2f LINE f SAMPLE --------------------------V n n f SAMPLE 2f LINE -------------------------- – 1 – = 0 2 = |
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