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OMAP3530ECBBA 数据表(PDF) 179 Page - Texas Instruments

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部件名 OMAP3530ECBBA
功能描述  OMAP3530 and OMAP3525 Applications Processors
PDF  265 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECBBA 数据表(HTML) 179 Page - Texas Instruments

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background image
sdrc_d0
sdrc_d7
sdrc_dm0
sdrc_dqs0
sdrc_d8
sdrc_d15
sdrc_dm1
sdrc_dqs1
sdrc_d16
sdrc_d23
sdrc_dm2
sdrc_dqs2
sdrc_d24
sdrc_d31
sdrc_dm3
sdrc_dqs3
sdrc_ba0
sdrc_ba1
sdrc_a0
sdrc_a14
sdrc_ncs0
sdrc_ncas
sdrc_nras
sdrc_nwe
sdrc_cke0
sdrc_clk
sdrc_nclk
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
BA0
BA1
A0
A14
CS
CAS
RAS
WE
CKE
CK
CK
T
T
T
T
T
T
T
T
OMAP35x
DQ0
DQ7
DM0
DQS0
DQ8
DQ15
DM1
DQS1
LPDDR
DQ16
DQ23
DM2
DQS2
DQ24
DQ31
DM3
DQS3
N/C
N/C
sdrc_ncs1
sdrc_cke1
OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Figure 6-18. OMAP35x LPDDR High Level Schematic (x32 memory)
6.4.2.2.2 Compatible JEDEC LPDDR Devices
Table 6-13 shows the parameters of the JEDEC LPDDR devices that are compatible with this interface.
Generally, the LPDDR interface is compatible with x16 and x32 LPDDR266 and LPDDR333 speed grade
LPDDR devices.
Table 6-13. Compatible JEDEC LPDDR Devices
NO.
PARAMETER
MIN
MAX
UNIT
NOTES
JEDEC LPDDR Device Speed
1
LPDDR-266
See Note (1)
Grade
2
JEDEC LPDDR Device Bit Width
16
32
Bits
3
JEDEC LPDDR Device Count
1
2
Devices
See Note (2)
JEDEC LPDDR Device Ball
4
60
90
Balls
Count
(1)
Higher LPDDR speed grades are supported due to inherent JEDEC LPDDR backwards compatibility.
(2)
1 x16 LPDDR device is used for 16 bit LPDDR memory system. 1x32 or 2x16 LPDDR devices are used for a 32-bit LPDDR memory
system.
Copyright © 2008–2013, Texas Instruments Incorporated
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
179
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Product Folder Links: OMAP3530 OMAP3525



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