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OMAP3530ECBBA 数据表(PDF) 116 Page - Texas Instruments |
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OMAP3530ECBBA 数据表(HTML) 116 Page - Texas Instruments |
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116 / 265 page  OMAP3530, OMAP3525 SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013 www.ti.com 2.5.9 System and Miscellaneous Terminals Table 2-26. System and Miscellaneous Signals Description SIGNAL NAME DESCRIPTION TYPE(1 BALL BALL TOP BALL BALL TOP BALL ) BOTTOM (CBB Pkg.) BOTTOM (CBC Pkg.) BOTTOM (CBB Pkg.) (CBC Pkg.) (CUS Pkg.) sys_32k 32-kHz clock input I AE25 NA AE20 NA AA16 sys_xtalin Main input clock. Oscillator input or LVCMOS at I AE17 NA AF19 NA AD15 19.2, 13, or 12 MHz. sys_xtalout Output of oscillator O AF17 NA AF20 NA AD14 sys_altclk Alternate clock source selectable for GPTIMERs I J25 NA J23 NA A24 (maximum 54 MHz), USB (48 MHz), or NTSC/PAL (54 MHz) sys_clkreq Request from OMAP3530/25 device for system IO AF25 NA W15 NA Y13 clock (open source type) sys_clkout1 Configurable output clock1 O AG25 NA AE14 NA Y7 sys_clkout2 Configurable output clock2 O AE22 NA W11 NA AA6 sys_boot0 Boot configuration mode bit 0 I AH26 NA F3 NA AB12 sys_boot1 Boot configuration mode bit 1 I AG26 NA D3 NA AC16 sys_boot2 Boot configuration mode bit 2 I AE14 NA C3 NA AD17 sys_boot3 Boot configuration mode bit 3 I AF18 NA E3 NA AD18 sys_boot4 Boot configuration mode bit 4 I AF19 NA E4 NA AC17 sys_boot5 Boot configuration mode bit 5 I AE21 NA G3 NA AB16 sys_boot6 Boot configuration mode bit 6 I AF21 NA D4 NA AA15 sys_nrespwron Power On Reset I AH25 NA V13 NA AA10 sys_nreswarm Warm Boot Reset (open drain output) IOD AF24 NA AD7 NA Y10 sys_nirq External FIQ input I AF26 NA V16 NA W16 sys_nvmode1 Indicates the voltage mode O AD26 NA AD15 NA Y16 sys_nvmode2 Indicates the voltage mode O AE26 NA W16 NA Y15 sys_off_mode Indicates the voltage mode O AF22 NA V12 NA AD23 sys_ndmareq0 External DMA request 0 (system expansion). I U8 NA B6 NA D2 Level (active low) or edge (falling) selectable. sys_ndmareq1 External DMA request 1 (system expansion). I T8 / J8 NA B4 / C6 NA F4 / C2 Level (active low) or edge (falling) selectable. sys_ndmareq2 External DMA request 2 (system expansion). I L3 / R8 NA D1 / C4 NA H2 / G5 Level (active low) or edge (falling) selectable. sys_ndmareq3 External DMA request 3 (system expansion). I K3 / P8 NA D2 / B5 NA G2 / F3 Level (active low) or edge (falling) selectable. sys_secure_ MSECURE transactions indicator O AG9 NA V2 NA AD5 indicator sys_drm_ MSECURE output O AF9 NA AA4 NA AC4 msecure (1) Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog) 2.5.10 Feed-Through Balls (CBC and CBB Packages) Feed-through pins represent a wire. That is, they do not connect to the silicon die, but rather just connect from the bottom ball to the top ball. The purpose of these balls is to allow for different PoP packages. Table 2-27 and Table 2-28 list the feed-through balls on the OMAP35x CBC and CBB packages, respectively. Table 2-27. CBC Package Feed-Through Balls JEDEC 14x14mm, 0.65mm, JEDEC DESCRIPTION (1) BALL TOP BALL BOTTOM FEED-THROUGH BALL 152ball NAME NC No Connect A1 A1 pop_a1_a1 d-vdd DDR Supply J1 L1 pop_j1_l1 NC No Connect AA1 AF1 pop_aa1_af1 (1) For more details on the feedthrough pin connections, please refer to the PoP memory datasheet. 116 TERMINAL DESCRIPTION Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: OMAP3530 OMAP3525 |
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