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PL602-37OC-R 数据表(PDF) 1 Page - Micrel Semiconductor |
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PL602-37OC-R 数据表(HTML) 1 Page - Micrel Semiconductor |
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1 / 10 page ![]() PL602-35/-37/-38/-39 750kHz – 800MHz Low Phase Noise Multiplier XO Universal Low Phase Noise IC’s Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/07/2012 Page 1 FEATURES Selectable 750kHz to 800MHz range. Low phase noise output -127dBc/Hz for 155.52MHz @ 10kHz offset -115dBc/Hz for 622.08MHz @ 10kHz offset LVCMOS (PL602-37), LVPECL (PL602-35 and PL602-38) or LVDS (PL602-39) output. 12MHz to 25MHz crystal input. No external crystal load capacitors required. Output Enable selector. Selectable /16 to x32 frequency divider/multiplier. 3.3V operation. Available in 16-Pin TSSOP or 16-pin 3x3mm QFN GREEN/RoHS compliant packages. DESCRIPTION The PL602-35 (LVPECL with inverted OE), PL602-37 (LVCMOS), PL602-38 (LVPECL), and PL602-39 (LVDS) are high performance and low phase noise XO IC chips. They provide phase noise performance as low as –127dBc at 10kHz offset (at 155MHz), by multi- plying the input crystal frequency up to 32x. The very low jitter makes them ideal for a wide range of applica- tions, including SONET/SDH and FEC. They accept fundamental parallel resonant mode crystals from 12MHz to 25MHz. BLOCK DIAGRAM PIN CONFIGURATION (Top View) ^: Internal pull-up *: On QFN package, PL602-35/-38 do not have SEL0 available: Pin 10 is VDD, pin 11 is GND. However, PL602-37/-39 have SEL0 (pin 10), and pin11 is VDD. See pin assignment table for details. Note: On QFN package there is a large center pad for thermal relief. This pad needs to be connected to GND. OUTPUT ENABLE LOGICAL LEVELS Part # OE State PL602-38 0 (Default) Output enabled 1 Tri-state PL602-35 PL602-37 PL602-39 0 Tri-state 1 (Default) Output enabled OE input: Logical states defined by LVPECL levels for PL602-38 Logical states defined by LVCMOS levels for PL602-37/-39 1 2 3 4 5 6 7 8 VDD 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 XIN XOUT SEL3^ SEL2^ OE GND GND SEL0^ SEL1^ GND CLKC VDD CLKT GND GND TSSOP-16L PL602-3x 1 2 3 4 12 11 10 9 13 14 15 16 8 7 6 5 SEL3^ XOUT SEL2^ OE VDD CLKT CLKC GND QFN-16L XIN XOUT OE CLKT PL602-3x CLKC PLL by-pass SEL[3:0] PLL (Phase Locked Loop) Oscillator Amplifier w/ integrated load cap. |
类似零件编号 - PL602-37OC-R |
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类似说明 - PL602-37OC-R |
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