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PL600-27TSI-R 数据表(PDF) 1 Page - Micrel Semiconductor |
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PL600-27TSI-R 数据表(HTML) 1 Page - Micrel Semiconductor |
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1 / 7 page ![]() PL600-27T Low Power 3 Output XO Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 6/24/10 Page 1 FEATURES 3 LVCMOS outputs with OE tri-state control Low current consumption: o <4.5mA @ 27MHz, 3.3V 10 to 52MHz fundamental crystal input 1 to 100MHz reference clock input Accepts both LVCMOS and sine wave inputs Low phase noise (-130 dBc @ 10kHz offset) Low jitter (RMS): 2.5ps period jitter 12mA drive capability at TTL output 1.8V to 3.3V operation Available in GREEN/RoHS 8-pin SOP and 6-pin SOT23 packages DESCRIPTION The PL600-27T is a low cost XO IC, designed to re- place multiple XO solutions saving the cost and board space of clock distribution buffers. In addition, it provides among the lowest current on the market for the 10MHz to 52MHz range. The PL600-27T ac- cepts crystal and clock inputs from 10 to 52MHz (fundamental resonant mode crystal) and provides low phase noise (<-130dBc at 10kHz offset at 30MHz), and very low jitter (2.5 ps RMS period jitter) outputs. PIN ASSIGNMENT BLOCK DIAGRAM Xtal Osc XIN/FIN XOUT CLK0 OE CLK1 CLK2 1 2 3 4 5 6 CLK1 GND FIN CLK2 CLK0 VDD SOT23-6L 1 2 3 4 5 6 7 8 XIN/FIN OE^ CLK1 GND XOUT VDD CLK2 CLK0 ^: Denotes internal Pull-up SOP-8L |
类似零件编号 - PL600-27TSI-R |
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类似说明 - PL600-27TSI-R |
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