PL502-03

Low Phase Noise VCXO (48MHz to 100MHz)

FEATURES

 VCXO output for the 48MHz to 100MHz range

 Low phase noise (-130 dBc @ 10kHz offset at

48MHz)

 LVCMOS output

 12 to 25MHz crystal input

 Integrated variable capacitors

 Selectable High Drive (30mA) or Standard Drive

(10mA) output

 Wide pull range (± 250 ppm typ)

 Low period jitter: 3.5ps RMS

 3.3V operation

 Available in 8-Pin SOP

DESCRIPTION

The PL502-03 is a low cost, high performance and

low phase noise VCXO for the 48 to 100MHz range,

providing less than -130dBc at 10kHz offset at

48MHz. The very low jitter (3.5ps RMS period jitter)

makes this chip ideal for applications requiring volt-

age controlled frequency sources. Input crystal can

range from 12 to 25MHz (fundamental resonant

mode).

PIN CONFIGURATION

Note: ^ deno tes i nternal pull up

OUTPUT RANGE

MULTIPLIER

FREQUENCY

RANGE

OUTPUT

BUFFER

X4

48 - 100MHz

LVCMOS

BLOCK DIAGRAM

1

2

3

4

5

6

7

8

XOUT

N/C

VCON

GND

XIN

VDD

CLK

OE^

SOP-8L

Reference

Divider

Phase

Comparator

Charge

Pump

Loop

Filter

VCO

VCO

Divider

XTAL

OSC

OE

XIN

XOUT

CLK

VCON

VARICAP