PL500-15/16

Low Phase Noise VCXO (1MHz to 18MHz)

4. Jitter and Phase Noise Specifications

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

RMS Period Jitter

(1 sigma – 1000 samples)

With capacitive decoupling

between VDD and GND.

2.5

ps

Phase Noise relative to carrier

13.5MHz @100Hz offset

-100

dBc/Hz

Phase Noise relative to carrier

13.5MHz @1kHz offset

-125

dBc/Hz

Phase Noise relative to carrier

13.5MHz @10kHz offset

-142

dBc/Hz

Phase Noise relative to carrier

13.5MHz @100kHz offset

-150

dBc/Hz

Phase Noise relative to carrier

13.5MHz @1MHz offset

-150

dBc/Hz

5. DC Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current, Dynamic,

with Loaded Outputs

Output load of

15pF

3.3V

3.7

5

mA

2.5V

2.4

3.5

Operating Voltage

2.25

3.63

V

Output Low Voltage at

CMOS level

0.4

V

Output High Voltage at

CMOS level

V

Output drive current

8

9.5

mA

VCXO Control Voltage

VCON

0

V

6. Crystal Specifications

PARAMETERS

SYMBOL

MIN.

TYP.

MAX.

UNITS

Crystal Loading Rating (VCON = 1.65V, 3.3V VDD)

(see note

below)

7.8

pF

Crystal Loading Rating (VCON = 1.25V, 2.5V VDD)

8.9

Maximum Sustainable Drive Level

200

W

Operating Drive Level

50

W

Max C0

5

pF

C0/C1

250

-

ESR

30

Ω

Note: The crystal must be such that it oscillates (parallel resonant) at nominal frequency when presented a C Load as specified above.

If the crystal requires more load to be at nominal frequency, the additional load must be added externally. This however may reduce the pull range.

Note that the Cload values above are for the IC only, and do not include PCB parasitics. Crystal specifications for Cload include PC B parasitics.