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ADP7157ACPZ-04-R7 数据表(PDF) 20 Page - Analog Devices

部件名 ADP7157ACPZ-04-R7
功能描述  High PSRR, RF Linear Regulator
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP7157ACPZ-04-R7 数据表(HTML) 20 Page - Analog Devices

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Data Sheet
ADP7157
Rev. A | Page 19 of 23
0
20
40
60
80
100
120
140
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAXIMUM
Figure 58. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 25°C
40
50
60
70
80
90
100
110
120
130
0
0.2
0.40.60.81.01.21.41.61.8
TOTAL POWER DISSIPATION (W)
6400mm2
500mm2
25mm2
TJ MAXIMUM
Figure 59. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 50°C
80
85
90
95
100
105
110
115
120
125
130
0
0.10.20.30.40.5
0.60.70.80.91.0
TOTAL POWER DISSIPATION (W)
TJ MAXIMUM
6400mm2
500mm2
25mm2
Figure 60. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC, TA = 85°C
Thermal Characterization Parameter (ΨJB)
When board temperature is known, use the thermal character-
ization parameter, ΨJB, to estimate the junction temperature rise
(see Figure 61 and Figure 62). Use the board temperature (TB)
and the power dissipation (PD) to calculate the maximum
junction temperature (TJ) by
TJ = TB + (PD × ΨJB)
(5)
The typical ΨJB value is 29.1°C/W for the 10-lead LFCSP
package and 30.1°C/W for the 8-lead SOIC package.
0
20
40
60
80
100
120
140
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
TOTAL POWER DISSIPATION (W)
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
TJ MAXIMUM
Figure 61. Junction Temperature vs. Total Power Dissipation for
the 10-Lead LFCSP
0
20
40
60
80
100
120
140
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
TOTAL POWER DISSIPATION (W)
TJ MAXIMUM
TB = 25°C
TB = 50°C
TB = 65°C
TB = 85°C
Figure 62. Junction Temperature vs. Total Power Dissipation for
the 8-Lead SOIC



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