ADP7158ACPZ-1.2-R7 datasheet(17/23 Pages) AD

17 / 23 page

ADP7158

Data Sheet

Rev. A | Page 16 of 22

PROGRAMMABLE PRECISION ENABLE

The ADP7158 uses the EN pin to enable and disable the VOUT pin

under normal operating conditions. As shown in Figure 48, when a

rising voltage on EN crosses the upper threshold, nominally

1.22 V, VOUT turns on. When a falling voltage on EN crosses the

lower threshold, nominally 1.13 V, VOUT turns off. The hysteresis

of the EN threshold is typically 90 mV.

The ADP7158 includes a discharge resistor on each VOUT,

VREG, REF, and BYP pin. These resistors turn on when the

device is disabled, which helps to discharge the associated

capacitor very quickly.

0.5

1.0

1.5

2.0

2.5

3.0

3.5

1.00

1.05

1.10

1.15

1.20

1.25

1.30

EN PIN VOLTAGE (V)

–40°C

–5°C

25°C

85°C

125°C

Figure 48. Typical VOUT Response to EN Pin Operation

0.5

1.0

1.5

2.0

2.5

3.0

3.5

–2

–1

123

678

TIME (ms)

VEN

VOUT

Figure 49. Typical VOUT Response to EN Pin Operation (VEN),

VOUT = 3.3 V, VIN = 5 V, CBYP = 1 μF

1.100

1.125

1.150

1.175

1.200

1.225

1.250

2.53.0

3.54.0

4.55.0

5.5

INPUT VOLTAGE (V)

EN RISING

EN FALLING

Figure 50. Typical EN Precision Threshold vs. Input Voltage (VIN)

The upper and lower thresholds are user programmable and can

be set higher than the nominal 1.22 V threshold by using two

resistors. Determine the resistance values, REN1 and REN2, from

REN1 = REN2 × (VEN − 1.22 V)/1.22 V

where:

REN2 typically ranges from 10 kΩ to 100 kΩ.

VEN is the desired turn-on voltage.

The hysteresis voltage increases by the factor

(REN1 + REN2)/REN2

For the example shown in Figure 51, the EN threshold is 2.44 V

with a hysteresis of 200 mV.

VOUT

VOUT_SENSE

REF_SENSE

REF

VIN

ADP7158

GND

CREF

1µF

CIN

10µF

COUT

10µF

OFF

VIN = 3.8V

VOUT = 3.3V

BYP

CBYP

1µF

REN1

100kΩ

REN2

100kΩ

VREG

CREG

1µF

Figure 51. Typical EN Pin Voltage Divider

Figure 51 shows the typical voltage divider configuration of the

EN pin. This configuration prevents on/off oscillations that can

occur due to noise on the EN pin as it passes through the

threshold points.

ADP7158ACPZ-1.2-R7 数据表(PDF) 17 Page - Analog Devices

ADP7158ACPZ-1.2-R7 数据表(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

数据表下载