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CDK1308 数据表(PDF) 7 Page - Exar Corporation

部件名 CDK1308
功能描述  Ultra Low Power, 20/40/65/80MSPS, 10-bit Analog-to-Digital Converters (ADCs)
PDF  14 Pages
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制造商  EXAR [Exar Corporation]
网页  http://www.exar.com
标志 EXAR - Exar Corporation

CDK1308 数据表(HTML) 7 Page - Exar Corporation

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Data Sheet
©2009-2013 Exar Corporation
7/14
Rev 1B
Electrical Characteristics - CDK1308B
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 40MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 2MHz
61.6
dBFS
FIN = 8MHz
60
61.6
dBFS
FIN ≃ FS/2
61.6
dBFS
FIN = 30MHz
61.5
dBFS
SINAD
Signal to Noise and Distortion Ratio
FIN = 2MHz
61.6
dBFS
FIN = 8MHz
60
61.6
dBFS
FIN ≃ FS/2
61.2
dBFS
FIN = 30MHz
61.4
dBFS
SFDR
Spurious Free Dynamic Range
FIN = 2MHz
80
dBc
FIN = 8MHz
70
81
dBc
FIN ≃ FS/2
72.0
dBc
FIN = 30MHz
80
dBc
HD2
Second order Harmonic Distortion
FIN = 2MHz
-90
dBc
FIN = 8MHz
-80
-90
dBc
FIN ≃ FS/2
-85
dBc
FIN = 30MHz
-85
dBc
HD3
Third order Harmonic Distortion
FIN = 2MHz
-80
dBc
FIN = 8MHz
-70
-81
dBc
FIN ≃ FS/2
-72.0
dBc
FIN = 30MHz
-80
dBc
ENOB
Effective number of Bits
FIN = 2MHz
9.9
bits
FIN = 8MHz
9.7
9.9
bits
FIN ≃ FS/2
9.9
bits
FIN = 30MHz
9.9
bits
Power Supply
AIDD
Analog Supply Current
9.3
mA
DIDD
Digital Supply Current
Digital core supply
1.7
mA
OIDD
Output Driver Supply
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT enabled
3.1
mA
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT disabled
2.2
mA
Analog Power Dissipation
16.7
mW
Digital Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
8.6
mW
Total Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
25.3
mW
Power Down Dissipation
9.7
µW
Sleep Mode
Power Dissipation, Sleep mode
11.3
mW
Clock Inputs
Max. Conversion Rate
40
MSPS
Min. Conversion Rate
20
MSPS



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