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MCP3919A1-E/SS 数据表(PDF) 35 Page - Microchip Technology |
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MCP3919A1-E/SS 数据表(HTML) 35 Page - Microchip Technology |
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35 / 88 page ![]() 2014 Microchip Technology Inc. DS20005347A-page 35 MCP3919 5.5 ADC Output Coding The second order modulator, SINC3+SINC1 filter, PGA, VREF and the analog input structure all work together to produce the device transfer function for the analog-to- digital conversion (see Equation 5-3). Each channel data is calculated on 24-bit (23-bit plus sign) and coded in two's complement format, MSB first. The output format can then be modified by the WIDTH_DATA<1:0> settings in the STATUSCOM register to allow 16-/24-/32-bit formats compatibility (see Section 9.5 “STATUSCOM Register – Status and Communication Register” for more information). In case of positive saturation (CHn+ – CHn- >VREF/1.5), the output is locked to 7FFFFF for 24-bit mode. In case of negative saturation (CHn+ - CHn- < -VREF/1.5), the output code is locked to 800000 for 24-bit mode. Equation 5-3 is only true for DC inputs. For AC inputs, this transfer function needs to be multiplied by the transfer function of the SINC3+SINC1 filter (see Equation 5-1 and Equation 5-3). EQUATION 5-3: For other than the default 24-bit data formats, Equation 5-3 should be multiplied by a scaling factor, depending on the data format used (defined by WIDTH_DATA<1:0>). The data format and associated scaling factors are given in Figure 5-5. FIGURE 5-5: Output Data Formats. The ADC resolution is a function of the OSR (Section 5.4 “SINC3 + SINC1 Filter”). The resolution is the same for all channels. No matter what the resolution is, the ADC output data is always calculated in 24-bit words with added zeros at the end if the OSR is not large enough to produce 24-bit resolution (left justification). DATA_CHn CH n+ CH n- – V REF+ V REF- – ----------------------------------------- 8,388,608 G 1.5 = For 24-bit Mode, WIDTH_Data<1:0> = 01(Default) WIDTH_DATA<1:0> = 11 32-bit with sign extension DATA <23> DATA <23:16> 31 0 DATA <15:8> DATA <7:0> WIDTH_DATA<1:0> = 10 32-bit with zeros padded 0x00 31 0 DATA <23:16> DATA <7:0> DATA <15:8> WIDTH_DATA<1:0> = 01 24-bit DATA <23:16> DATA <15:8> DATA <7:0> 23 0 WIDTH_DATA<1:0> = 00 16-bit DATA <15:8> 15 0 DATA <23:16> Rounded Unformatted ADC data DATA <23:16> DATA <15:8> DATA <7:0> 23 0 x1/256 x1 x256 x1 Scaling Factor |
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