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LM2403 数据表(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LM2403
功能描述  Monolithic Triple 4.5 nS CRT Driver
PDF  11 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LM2403 数据表(HTML) 6 Page - National Semiconductor (TI)

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Application Hints (Continued)
Output
Swing
Rise Time
Fall Time
10V–50V
4.0 ns
5.0 ns
15V–55V
4.2 ns
4.8 ns
20V–60V
4.4 ns
5.0 ns
THERMAL CONSIDERATIONS
Figure 4 shows the performance of the LM2403 in the test
circuit shown in
Figure 2 as a function of case temperature.
The figure shows that the speed of the LM2403 decreases
by less than 10% as the case temperature increases from
50˚C to 100˚C. This corresponds to a speed degradation of
2% for every 10˚C rise in case temperature.
Figure 6 shows the total power dissipation of the LM2403 vs.
Frequency when all three channels of the device are driving
an 8 pF load with a 40V
p-p signal. The graph assumes a 72%
active time (device operating at the specified frequency)
which is typical in a monitor application. The other 28% of
the time the device is assumed to be sitting at the black level
(65V in this case). This graph gives the designer the informa-
tion needed to determine the heat sink requirement for his
application. The designer should note that if the load capaci-
tance is increased the AC component of the total power dis-
sipation will also increase.
The LM2403 case temperature must be maintained below
100˚C. If the maximum expected ambient temperature is
50˚C and the maximum power dissipation is 12W, then a
maximum heat sink thermal resistance can be calculated:
This example assumes a capacitive load of 8 pF and no re-
sistive load.
TYPICAL APPLICATION
A typical application of the LM2403 is shown in
Figure 11.
Used in conjunction with an LM1283, a complete video chan-
nel from monitor input to CRT cathode can be achieved. Per-
formance is satisfactory for resolutions up to 1600 x 1200
and pixel clock frequencies up to 160 MHz.
Figure 11 is the
schematic for the NSC demonstration board that can be
used to evaluate the LM1283/2403 combination in a monitor.
PC Board Layout Considerations
For optimum performance, an adequate ground plane, isola-
tion between channels, good supply bypassing and minimiz-
ing unwanted feedback are necessary. Also, the length of the
signal traces from the preamplifier to the LM2403 and from
the LM2403 to the CRT cathode should be as short as pos-
sible. The following references are recommended:
Ott, Henry W., “Noise Reduction Techniques in Electronic
Systems”, John Wiley & Sons, New York, 1976.
“Guide to CRT Video Design”, National Semiconductor Appli-
cation Note 861.
“Video Amplifier Design for Computer Monitors”, National
Semiconductor Application Note 1013.
Pease,
Robert A.,
“Troubleshooting Analog
Circuits”,
Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may os-
cillate in a monitor if feedback occurs around the video chan-
nel through the chassis wiring. To prevent this, leads to the
video amplifier input circuit should be shielded, and input cir-
cuit wiring should be spaced as far as possible from output
circuit wiring.
NSC Demonstration Board
Figures 12, 13 show routing and component placement on
the NSC LM1283/2403 demonstration board. The schematic
of the board is shown in
Figure 11. This board provides a
good example of a layout that can be used as a guide for fu-
ture layouts. Note the location of the following components:
C79 — V
CC bypass capacitor, located very close to pin 6
and ground pins
C55 — V
BB bypass capacitor, located close to pin 10 and
ground
C75–C77 — V
CC bypass capacitors, near LM2403 and
V
CC clamp diodes. Very important for arc protection
The routing of the LM2403 outputs to the CRT is very critical
to achieving optimum performance.
Figure 14 shows the
routing and component placement from pin 1 to the blue
cathode. Note that the components are placed so that they
almost line up from the output pin of the LM2403 to the blue
cathode pin of the CRT connector. This is done to minimize
the length of the video path between these two components.
Note also that D7, D8, R32 and D3 are placed to minimize
the size of the video nodes that they are attached to. This
minimizes parasitic capacitance in the video path and also
enhances the effectiveness of the protection diodes. The an-
ode of protection diode D8 is connected directly to a section
of the the ground plane that has a short and direct path to the
LM2403 ground pins. The cathode of D7 is connected to V
CC
very close to decoupling capacitor C77 (see
Figure 14)
which is connected to the same section of the ground plane
as D8. The diode placement and routing is very important for
minimizing the voltage stress on the LM2403 during an arc
over event. Lastly, notice that S1 is placed very close to the
blue cathode and is tied directly to CRT ground.
www.national.com
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