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DM562P 数据表(PDF) 30 Page - Davicom Semiconductor, Inc. |
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DM562P 数据表(HTML) 30 Page - Davicom Semiconductor, Inc. |
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30 / 48 page ![]() DM562P V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip with Memory Built in 30 Final Capabilities Pointer (Xxxxxx34 - Cap _Ptr) 0 0 0000 11 Cap_Ptr Offset 34H 0 7 Bit Default Type Description 31:8 000000h RO Reserved 7:0 01010000 RO Capability Pointer The Cap_Ptr provides an offset (default is 50h) into the function’s PCI Configuration Space for the location of the first term in the Capabilities Linked List. The Cap_Ptr offset is DOUBLE WORD aligned so the two least significant bits significant bits are always “0”s Interrupt & Latency Configuration (Xxxxxx3c - PCIINT) 31 16 15 0 87 23 24 MAX_LAT MIN_GNT INT_PIN INT_LINE Maximum Latency Timer Minimum Grant Interrupt Pin Interrupt Line Bit Default Type Description 31:24 28h RO Maximum Latency Timer that can be sustained (Read Only and Read As 28h) 23:16 14h RO Minimum Grant Minimum Length of a Burst Period (Read Only and Read As 14h) 15:8 01h RO Interrupt Pin read as 01h to indicate INTA# 7:0 XXh RW Interrupt Line that Is Routed to the Interrupt Controller Version: DM562P-DS-F01 February 02, 2004 |
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