FPV1006-85-R datasheet(22/30 Pages) VICOR

22 / 30 page

Cool-Power®

Rev 1.3

vicorpower.com

Page 22 of 30

12/2015

800 927.9474

PI34xx-00

Functional Description

The PI34xx-00 is a family of highly integrated ZVS-Buck

regulators. The PI34xx-00 has a set output voltage that is

trimmable within a prescribed range shown in Table 1.

Performance and maximum output current are characterized

with a specific external power inductor

(see Table 4).

For basic operation, Figure 36 shows the connections and

components required. No additional design or settings are

required.

ENABLE (EN)

EN is the enable pin of the regulator. The EN Pin is referenced

to SGND and permits the user to turn the regulator on or off.

The EN polarity is a positive logic assertion. If the EN pin is

left floating or asserted high, the regulator output is enabled.

Pulling EN pin below 0.8 Vdc with respect to SGND will

disable the regulator output.

Remote Sensing

An internal 100 Ω resistor is connected between REM pin and

VOUT pin to provide regulation when the REM connection is

broken. Referring to Figure 36, it is important to note that L1

and Cout are the output filter and the local sense point for

the power supply output. As such, the REM pin should be

connected at Cout as the default local sense connection

unless remote sensing to compensate additional distribution

losses in the system. The REM pin should not be left floating.

Switching Frequency Synchronization

The SYNCI input allows the user to synchronize the

controller switching frequency by an external clock

referenced to SGND. The external clock can synchronize the

unit between 50% and 110% of the preset switching

frequency (fS).

The PI34xx-00 syncs to the falling edge of the applied clock

providing 180° phase shift from SYNCO. This allows for the

paralleling of two PI34xx-00 devices. When using the

internal oscillator, the SYNCO pin provides a 5 V clock that

can be used to sync other regulators. Therefore, one PI34xx-

00 can act as the lead regulator and have additional

PI34xx-00s running in parallel and interleaved.

Soft-Start

The PI34xx-00 includes an internal soft-start capacitor to

ramp the output voltage in 2ms from 0 V to full output

voltage. Connecting an external capacitor from the TRK pin

to SGND will increase the start-up ramp period. See, “Soft

Start Adjustment and Track,” in the Applications Description

section for more details.

Output Voltage Trim

The PI34xx-00 output voltage can be trimmed up from the

preset output by connecting a resistor from ADJ pin to SGND

and can be trimmed down by connecting a resistor from ADJ

pin to VOUT. The Table 1 defines the voltage ranges for the

PI34xx-00 family.

Output Current Limit Protection

PI34xx-00 has two methods implemented to protect from

output short or over current condition.

Slow Current Limit protection: prevents the output load from

sourcing current higher than the regulator’s maximum rated

current. If the output current exceeds the Current Limit

(IOUT_CL) for 1024 us, a slow current limit fault is initiated and

the regulator is shutdown which eliminates output current

flow. After Fault Restart Delay (tFR_DLY), a soft-start cycle is

initiated. This restart cycle will be repeated indefinitely until

the excessive load is removed.

Fast Current Limit protection: PI34xx-00 monitors the

regulator inductor current pulse-by-pulse to prevent the

output from supplying very high current due to sudden low

impedance short

(50 A Typical). If the regulator senses a high inductor current

pulse, it will initiate a fault and stop switching until Fault

Restart Delay ends and then initiate a soft-start cycle.

Input Undervoltage Lockout

If VIN falls below the input Undervoltage Lockout (UVLO)

threshold, the regulator will enter a low power state and

initiate a fault. The system will restart once the input voltage

is reestablished and after the Fault Restart Delay.

Input Overvoltage Lockout

If VIN exceeds the input Overvoltage Lockout (OVLO)

threshold (VOVLO), while the regulator is running, the

PI34xx-00 will complete the current cycle and stop

switching. The system will resume operation after the Fault

Restart Delay.

Figure 36 — ZVS-Buck with required components

OUT

SYNCI

VS1

OUT

PGND

SYNCO

REM

TRK

ADJ

EAO

PI34xx

OUT

Table 1 — PI34xx-00 family output voltage ranges

Device

Output Voltage

Set

Range

PI3420-00-LGIZ

1.0 V

1.0 to 1.4 V

PI3421-00-LGIZ

1.8 V

1.4 to 2.0 V

PI3422-00-LGIZ

2.5 V

2.0 to 3.1 V

PI3423-00-LGIZ

3.3 V

2.3 to 4.1 V

PI3424-00-LGIZ

5.0 V

3.3 to 6.5 V

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