FPV1006-125-R datasheet(26/30 Pages) VICOR

26 / 30 page

Cool-Power®

Rev 1.3

vicorpower.com

Page 26 of 30

12/2015

800 927.9474

PI34xx-00

Table 6 — Capacitor manufacturer part numbers

OUT

Figure 41 — Typical Buck Regulator

OUT

Figure 42 — Current flow: Q1 closed

OUT

Figure 43 — Current flow: Q2 closed

OUT

GND

VSW

GND

Figure 44 — Recommended component placement and metal routing

Murata Part Number

Description

GRM188R71C105KA12D

1 µF 16 V 0603 X7R

GRM319R71H104KA01D

0.1 µF 50 V 1206 X7R

GRM31CR60J107ME39L

100 µF 6.3 V 1206 X5R

GRM31CR61A476ME15L

47 µF 10 V 1206 X5R

GRM31CR61E226KE15L

22 µF 25 V 1206 X5R

Layout Guidelines

To achieve maximum efficiency and low noise performance

from a PI34xx-00 design, layout considerations are necessary.

Reducing trace resistance and minimizing high current loop

returns along with proper component placement will

contribute to optimal performance.

A typical buck regulator circuit is shown in Figure 41. The

potential areas of high parasitic inductance and resistance

are the circuit return paths, shown as LR below.

The path between the COUT and CIN capacitors is of particular

importance since the AC currents are ﬂowing through both

of them when Q1 is turned on.

Figure 42, schematically, shows the reduced trace length

between input and output capacitors. The shorter path

lessens the effects that copper trace parasitics can have on

the PI34xx-00 performance.

When Q1 is on and Q2 is off, the majority of CIN’s current is

used to satisfy the output load and to recharge the COUT

capacitors. When Q1 is off and Q2 is on, the load current is

supplied by the inductor and the COUT capacitor as shown in

Figure 43. During this period CIN is also being recharged by

the VIN. Minimizing CIN loop inductance is important to

reduce peak voltage excursions when Q1 turns off. Also, the

difference in area between the CIN loop and COUT loop is vital

to minimize switching and GND noise.

The recommended component placement, shown in Figure

, illustrates the tight path between CIN and COUT (and VIN

and VOUT) for the high AC return current. This optimized

layout is used on the PI34xx-00 evaluation board.

Figure 45 details the recommended receiving footprint for

PI34xx-00 10 mm x 14 mm package. All pads should have a

ﬁnal copper size of 0.55 mm x 0.5 5mm, whether they are

solder-mask deﬁned or copper deﬁned, on a 1 mm x 1 mm

grid. All stencil openings are 0.55 mm when using

6mil stencil.

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