If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage, V

CC

+90V

Bias Voltage, V

BB

+16V

Input Voltage, V

IN

0V to 6V

Storage Temperature Range,T

STG

−65˚C to +150˚C

Lead Temperature (Soldering,

≤10 sec.)

300˚C

ESD Tolerance, Human Body Model

2kV

Machine Model

250V

V

CC

+60V to +85V

V

BB

+10V to +15V

V

IN

+1V to +5V

V

OUT

+15 to +75V

Case Temperature

−20˚C to +100˚C

Do not operate the part without a heat sink.

Unless otherwise noted: V

Symbol

Parameter

Conditions

LM2413

Units

Min

Typ

Max

I

CC

Supply Current

Per Channel, No Output Load

10

16

22

mA

I

BB

Bias Current

All three channels

15

25

35

mA

V

OUT

DC Output Voltage

V

62

65

68

V

DC

A

V

DC Voltage Gain

−12

−14

−16

∆A

V

Gain Matching

(Note 4)

1.0

dB

LE

Linearity Error

(Notes 4, 5)

3.5

%

t

R

Rise Time (Notes 6, 7)

10% to 90%,40V

3.7

4.7

ns

t

F

Fall Time (Notes 6, 7)

90% to 10%,40V

4.4

5.4

ns

OS

Overshoot (Note 6)

(Note 6), 40 V

5

%

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.

Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and

test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may

change when the device is not operated under the listed test conditions.

Note 3: All voltages are measured with respect to GND, unless otherwise specified.

Note 4: Calculated value from Voltage Gain test on each channel.

Note 7: 100% tested in production. These limits are not used to calculate outgoing quality levels.

AC Test Circuit

Figure 2 shows a typical test circuit for evaluation of the

LM2413. This circuit is designed to allow testing of the

LM2413 in a 50

Ω environment without the use of an expen-

sive FET probe. The combined resistors of 4950

Ω at the out-

put form a 200:1 voltage divider when connected to a 50

Ω

load. The compensation cap is used to flatten the frequency

response of the 200:1 divider.

DS101275-3

FIGURE 2. Test Circuit (One Channel)

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