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DS2156L 数据表(PDF) 13 Page - Dallas Semiconductor |
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DS2156L 数据表(HTML) 13 Page - Dallas Semiconductor |
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13 / 262 page  DS2156 13 of 262 2.1 Block Diagram Figure 2-1 shows a simplified block diagram featuring the major components of the DS2156. Details are shown in subsequent figures. About 30 device pins have dual functions depending on the selection of the backplane, UTOPIA, or TDM. Some of the block diagrams depict a configuration based on the state of the backplane selection. The block diagram is divided into three functional blocks: LIU, FRAMER, and BACKPLANE INTERFACE. Figure 2-1. Block Diagram TX LIU CLOCK ADAPTER BACKPLANE INTERFACE CIRCUIT UTOPIA or TDM HOST INTERFACE CLOCK JTAG ESIB RX LIU MUX MUX EXTERNAL ACCESS TO RECEIVE SIGNALS (TDM BACKPLANE ONLY) EXTERNAL ACCESS TO TRANSMIT SIGNALS (TDM BACKPLANE ONLY) BACKPLANE CLOCK SYNTH LIU FRAMER BACKPLANE INTERFACE SYNC HDLCs SINGALING ALARM DET FRAMER CRC GEN SINGALING ALARM GEN HDLCs HDB3 / B8ZS HDB3 / B8ZS DS2156 |
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