PIN DESCRIPTION

PIN No

SYMBOL

NAME AND FUNCTION

1

SI

Serial Data Inputs

2, 3, 4, 5,

10, 11, 12,

14

A to H

Parallel Data Inputs

6

CK INH

Clock Enable Input

(Active LOW)

7

CK

Clock Input (LOW to

HIGH edge-triggered)

9

CLEAR

Asyncronous Master reset

Input (Active LOW)

13

Serial Output from the

Last Stage

15

S/L

Parallel Enable Input

(Active LOW)

8

GND

Ground (0V)

16

Positive Supply Voltage

IEC LOGIC SYMBOL

INPUT AND OUTPUT EQUIVALENT CIRCUIT

TRUTH TABLE

INPUTS

INTERNAL

OUTPUTS

OUTPUTS

CLEAR

SHIFT/LOAD CLOCK INH

CLOCK

SERIAL IN

PARALLEL

A...............H

QA

QB

QH

L

XXXX

X

L

L

L

L

X

X

X

X

NO CHANGE

HL

L

X

a................ha

b

h

H

H

L

H

X

H

QAn

QGn

H

H

L

L

X

L

QAn

QGn

H

X

H

X

X

X

NO CHANGE

X: Don’t Care

a...........h : The level of steady state input voltage at inputs a trough H respectively

M54/M74HC166

2/13