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PI2127 数据表(PDF) 13 Page - Vicor Corporation |
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PI2127 数据表(HTML) 13 Page - Vicor Corporation |
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13 / 19 page ![]() Picor Corporation • picorpower.com PI2127 Rev 1.3 Page 13 of 19 happens, the MOSFET is turned on and the FT pin will be high resistance to indicate that the MOSFET is in RDS(on) with no fault conditions existing. Note that in case of an input fault condition, where the S pin is at ground and the output (D pin and SN pin) are at a high voltage there will be two current paths, one path from D pin to GND and the other path from SN pin to SP. The current path from D pin to GND and S pins is due to the level shift circuit and will draw current from the output as a function of the voltage between D pin and GND (VD-GND) based on the following equation: Ω − = − − k V V I GND D FLT D 15 5 . 0 Where: FLT D I − : Maximum D pin current during input short fault condition GND D V − : Voltage difference between the D pin and ground. The current path from SN pin to S pin is a function of the SN voltage based on the following equation: PAR GND SN FLT SN R V V I 12 _ − = − Where: FLT SN I _ : SN current during input short fault condition GND SN V − : Voltage difference between SN pin (or load voltage) and ground. PAR R : Resistance of the internal path, 10KΩ typical and 8kΩ minimum The level shift circuit worst case power dissipation during input short is: Ω − = − k V V Pd GND D 15 ) 5 . 0 ( 2 The thermal resistance and power dissipation of the level shift circuit will limit the voltage applied at the D pin during a shorted input condition. When the PCB temperature exceeds 110°C, the applied voltage must be derated according to Figure 21. The plot in Figure 21 is calculated using the worst case power dissipation during an input short with RθJ-PCB= 100°C/W. Figure 21: Level shift circuit applied voltage de-rating (valid during an input short fault condition as a function of PCB Temperature) |
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