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MVQIL2 数据表(PDF) 1 Page - MMD Components |
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MVQIL2 数据表(HTML) 1 Page - MMD Components |
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1 / 5 page ![]() MMD Monitor/Quartztek 30400 Esperanza, Rancho Santa Margarita, CA, 92688 Phone: (949) 709-5075, Fax: (949) 709-3536, www.mmdcomp.com Sales@mmdcomp.com 06/11/14 D Subject to change without notice Pg 1 of 5 Revision: M MV VQ QII S Se erriie ess 5 5X X7 7 C Ce erra am miicc S SM MD D V VC CX XO O User Selectable Up to Two Frequencies LVDS, LVPECL OR CMOS 6 Pad Standard Package OneClock Frequency Range CMOS 10MHZ to 250MHZ Frequency Range LVDS & LVPECL 50.000MHZ to 1.50GHZ Temperature Stability* (See Part Number Guide for Options) Operating Temperature Range (See Part Number Guide for Options) Storage Temperature Range -55°C to +125°C Aging (+25°C ±3°C) ±5ppm for first year Waveform LVPECL CMOS LVDS Supply Voltage ±5% (Vdd) +2.50 VDC +3.30 VDC +2.50 VDC +3.30 VDC +2.50 VDC +3.30 VDC Supply Current 54mA typ 20mA typ 25mA typ 23mA typ Load 50Ω 15pF 10 TTL Gates or 30pF 100Ω Vol .800V typ 1.60V typ 10% Vdd max 1.1V typ 0.9V typ Voh 1.55V typ 2.35V typ 90% Vdd min 1.5V typ 1.6V typ Differential Voltage .400V typ .450V typ Rise/Fall Time (10% to 90% of Supply Voltage) 0.6nSec max 4nSec 0.6nSec max Symmetry (50% of waveform) (See Part Number Guide for Options) Start-up Time 10mSec max Period Jitter (RMS) <2.5pSec Tri-State Operation (Single Frequency Output only) Vih = 70% of Vdd min to Enable Output Vil = 30% max or grounded to Disable Output (High Impedance) Control Voltage (Vc) 1.25 VDC ±1.00 VDC 1.65 VDC ±1.50 VDC 1.25 VDC ±1.00 VDC 1.65 VDC ±1.50 VDC 1.25 VDC ±1.00 VDC 1.65 VDC ±1.50 VDC Pullability ±100ppm Linearity 10% Tristate Current Consumption (Disabled) 16mA Absolute Maximum Voltage (Vdd) 4.20 Volts DC * Inclusive of Temperature., Load and Voltage .750V typ Phase Jitter (12KHZ to 20MHZ) <1.0pSec typ |
类似零件编号 - MVQIL2 |
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类似说明 - MVQIL2 |
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