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PM5347 数据表(PDF) 75 Page - PMC-Sierra, Inc |
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PM5347 数据表(HTML) 75 Page - PMC-Sierra, Inc |
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75 / 302 page ![]() PM5347 S/UNI-PLUS DATA SHEET PMC-941033 ISSUE 6 SATURN USER NETWORK INTERFACE PLUS PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 59 The BIP-8 calculation is based on the scrambled data of the complete STS-3c/1 (STM-1) frame. The section BIP-8 code is based on a bit interleaved parity calculation using even parity. Details are provided in the references. The calculated BIP-8 code is then inserted into the B1 byte of the following frame before scrambling. BIP-8 errors may be continuously inserted under register control for diagnostic purposes. Framing and Identity Insert The Framing and Identity Insert Block inserts the framing bytes (A1, A2) and trace/growth bytes (J0/Z0) into the STS-3c/1 (STM-1) frame. Framing bit errors may be continuously inserted under register control for diagnostic purposes. Scrambler The Scrambler Block utilizes a frame synchronous scrambler to process the transmit stream when enabled through an internal register accessed via the microprocessor interface. The generating polynomial is x7 + x6 + 1. Precise details of the scrambling operation are provided in the references. Note that the framing bytes and the identity bytes are not scrambled. All zeros may be continuously inserted (after scrambling) under register control for diagnostic purposes. 9.12 Transmit Line Overhead Processor The Transmit Line Overhead Processor (TLOP) provides line level alarm signal insertion, and line BIP-24/8 insertion (B2). APS Insert The APS Insert Block inserts the two automatic protection switch (APS) channel bytes in the Line Overhead (K1 and K2) into the transmit stream when enabled by an internal register. Line BIP Calculate The Line BIP Calculate Block calculates the line BIP-24/8 error detection code (B2) based on the line overhead and synchronous payload envelope of the transmit stream. The line BIP-24/8 code is a bit interleaved parity calculation using even parity. Details are provided in the references. The calculated BIP-24/8 code is inserted into the B2 byte positions of the following frame. |
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