VIPER35 datasheet(20/44 Pages) STMICROELECTRONICS

20 / 44 page

Operation description

VIPer35

20/44

DocID026980 Rev 4

The following formula can be used to calculate CVDD capacitor:

Equation 1

tSSaux is the time needed for the steady-state of the auxiliary voltage. It represents an

estimate of the user's application according to the output stage configurations (transformer,

output capacitances, etc.).

During the normal operation, the power MOSFET switches on after the transformer

demagnetization, detected through the voltage VZCD sensed on ZCD pin.

At power-up, the initial output voltage is zero and the voltage VZCD is not so high to correctly

arm the internal ZCD circuit. In this case, the power MOSFET turns on with the fixed

frequency FSTARTER, reported in Table 7. After the start-up, as soon as the voltage on ZCD

logic is enabled to work, the turn-on of the power MOSFET is driven by this circuit and it is

not related to the internal oscillator (except for the frequency foldback function) any longer.

The start-up phase is managed by a dedicated internal logic and is activated by every

attempt of the start-up converter or after a fault.

An internal clock counter defines the start-up time, tSU, since during quasi-resonant

operation, the switching frequency and the duration of the start-up time depend on the load,

tSU range is indicated in Table 7. At the beginning of the start-up time, the drain current

limitation progressively rises to the maximum value. In this way a soft-start occurs and the

stress on the secondary diode is considerably reduced. It also prevents transformer

saturation.

The soft-start time lasts 3.5 ms (VIPER35L) or 4.2 ms (VIPER35H), (see tSS in Table 7).

At the start-up, until the output voltage reaches its regulated value, the feedback loop is

open and an improper activation of the overload protection could occur. In order to avoid

this, OLP logic is disabled and it is active at the end of the start-up phase, t > tSU. Figure 29

and Figure 30 show two possible start-up cases.

As soon as the output voltage reaches the regulated value, the regulation loop takes over

and the drain current is regulated below its limit, IDlim, by the feedback voltage, which is at a

value lower than the VFBlin threshold.

VDD

DDch

SSaux

DDon

DDoff

–

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