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STM32F446RC 数据表(PDF) 159 Page - STMicroelectronics |
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STM32F446RC 数据表(HTML) 159 Page - STMicroelectronics |
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159 / 202 page  DocID027107 Rev 6 159/202 STM32F446xC/E Electrical characteristics 175 Synchronous waveforms and timings Figure 54 through Figure 57 represent synchronous waveforms and Table 94 through Table 97 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • BurstAccessMode = FMC_BurstAccessMode_Enable; • MemoryType = FMC_MemoryType_CRAM; • WriteBurst = FMC_WriteBurst_Enable; • CLKDivision = 1; (0 is not supported, see the STM32F446 reference manual: RM0390) • DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM Table 92. Asynchronous multiplexed PSRAM/NOR write timings(1)(2) 1. CL = 30 pF. 2. Guaranteed based on test during characterization. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 4THCLK - 2 4THCLK+0.5 ns tv(NWE_NE) FMC_NEx low to FMC_NWE low THCLK THCLK + 0.5 tw(NWE) FMC_NWE low time 2THCLK 2THCLK + 0.5 th(NE_NWE) FMC_NWE high to FMC_NE high hold time THCLK - tv(A_NE) FMC_NEx low to FMC_A valid - 0 tv(NADV_NE) FMC_NEx low to FMC_NADV low 0.5 1 tw(NADV) FMC_NADV low time THCLK – 0.5 THCLK+ 0.5 th(AD_NADV) FMC_AD(adress) valid hold time after FMC_NADV high) THCLK – 2 - th(A_NWE) Address hold time after FMC_NWE high THCLK - th(BL_NWE) FMC_BL hold time after FMC_NWE high THCLK–2 - tv(BL_NE) FMC_NEx low to FMC_BL valid - 2 tv(Data_NADV) FMC_NADV high to Data valid - THCLK + 1.5 th(Data_NWE) Data hold time after FMC_NWE high THCLK + 0.5 - Table 93. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings(1)(2) 1. CL = 30 pF. 2. Guaranteed based on test during characterization. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 9THCLK 9THCLK + 0.5 ns tw(NWE) FMC_NWE low time 7THCLK 7THCLK + 2 tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 6THCLK + 1.5 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 4THCLK – 1 - |
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