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STM32F446RC 数据表(PDF) 170 Page - STMicroelectronics

部件名 STM32F446RC
功能描述  ARM Cortex-M4 32b MCUFPU, 225DMIPS, up to 512kB Flash/1284KB RAM, USB OTG HS/FS, 17 TIMs, 3 ADCs, 20 comm. interfaces
PDF  202 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F446RC 数据表(HTML) 170 Page - STMicroelectronics

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Electrical characteristics
STM32F446xC/E
170/202
DocID027107 Rev 6
Table 100. SDRAM read timings(1)(2)
1. CL = 30 pF on data and address lines. CL=15pF on FMC_SDCLK.
2. Guaranteed based on test during characterization.
Symbol
Parameter
Min
Max
Unit
tw(SDCLK)
FMC_SDCLK period
2THCLK-0.5
2THCLK+0.5
ns
tsu(SDCLKH _Data)
Data input setup time
1
-
th(SDCLKH_Data)
Data input hold time
4
-
td(SDCLKL_Add)
Address valid time
-
3
td(SDCLKL_ SDNE)
Chip select valid time
-
1.5
th(SDCLKL_SDNE)
Chip select hold time
0
-
td(SDCLKL_SDNRAS) SDNRAS valid time
-
1.5
th(SDCLKL_SDNRAS) SDNRAS hold time
0
-
td(SDCLKL_SDNCAS) SDNCAS valid time
-
0.5
th(SDCLKL_SDNCAS) SDNCAS hold time
0
-
Table 101. LPSDR SDRAM read timings(1)(2)
1. CL = 10 pF.
2. Guaranteed based on test during characterization.
Symbol
Parameter
Min
Max
Unit
tw(SDCLK)
FMC_SDCLK period
2THCLK - 0.5
2THCLK + 0.5
ns
tsu(SDCLKH _Data)
Data input setup time
1
-
th(SDCLKH_Data)
Data input hold time
5
-
td(SDCLKL_Add)
Address valid time
-
3
td(SDCLKL_ SDNE)
Chip select valid time
-
3
th(SDCLKL_SDNE)
Chip select hold time
0
-
td(SDCLKL_SDNRAS) SDNRAS valid time
-
2
th(SDCLKL_SDNRAS) SDNRAS hold time
0
-
td(SDCLKL_SDNCAS) SDNCAS valid time
-
2
th(SDCLKL_SDNCAS) SDNCAS hold time
0
-



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