数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

STM32F479AI 数据表(PDF) 9 Page - STMicroelectronics

部件名 STM32F479AI
功能描述  ARMCortex-M4 32b MCUFPU, 225DMIPS, up to 2MB Flash/3844KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Crypto, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
PDF  217 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F479AI 数据表(HTML) 9 Page - STMicroelectronics

Back Button STM32F479AI Datasheet HTML 5Page - STMicroelectronics STM32F479AI Datasheet HTML 6Page - STMicroelectronics STM32F479AI Datasheet HTML 7Page - STMicroelectronics STM32F479AI Datasheet HTML 8Page - STMicroelectronics STM32F479AI Datasheet HTML 9Page - STMicroelectronics STM32F479AI Datasheet HTML 10Page - STMicroelectronics STM32F479AI Datasheet HTML 11Page - STMicroelectronics STM32F479AI Datasheet HTML 12Page - STMicroelectronics STM32F479AI Datasheet HTML 13Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 217 page
background image
DocID028010 Rev 3
9/217
STM32F479xx
List of figures
11
List of figures
Figure 1.
Incompatible board design for LQFP176 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 2.
Incompatible board design for LQFP208 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 3.
UFBGA176 port-to-terminal assignment differences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 4.
TFBGA216 port-to-terminal assignment differences. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 5.
STM32F479xx block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 6.
STM32F479xx Multi-AHB matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 7.
VDDUSB connected to an external independent power supply . . . . . . . . . . . . . . . . . . . . . 29
Figure 8.
Power supply supervisor interconnection with internal reset OFF . . . . . . . . . . . . . . . . . . . 30
Figure 9.
PDR_ON control with internal reset OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 10.
Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 11.
Startup in regulator OFF: slow VDD slope
- power-down reset risen after VCAP_1 , VCAP_2 stabilization . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 12.
Startup in regulator OFF mode: fast VDD slope
- power-down reset risen before VCAP_1 , VCAP_2 stabilization . . . . . . . . . . . . . . . . . . . . . . 34
Figure 13.
STM32F47x LQFP100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 14.
STM32F47x LQFP144 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 15.
STM32F47x WLCSP168 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 16.
STM32F47x UFBGA169 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 17.
STM32F47x UFBGA176 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Figure 18.
STM32F47x LQFP176 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 19.
STM32F47x LQFP208 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 20.
STM32F47x TFBGA216 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Figure 21.
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 22.
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 23.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 24.
Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 25.
Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
Figure 26.
External capacitor CEXT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 27.
Typical VBAT current consumption
(RTC ON / backup SRAM ON and LSE in Low drive mode) . . . . . . . . . . . . . . . . . . . . . . 106
Figure 28.
Typical VBAT current consumption
(RTC ON / backup SRAM ON and LSE in High drive mode) . . . . . . . . . . . . . . . . . . . . . . 107
Figure 29.
High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 30.
Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Figure 31.
Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Figure 32.
Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Figure 33.
ACCHSI vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 34.
ACCLSI versus temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 35.
PLL output clock waveforms in center spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 36.
PLL output clock waveforms in down spread mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Figure 37.
MIPI D-PHY HS/LP clock lane transition timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 38.
MIPI D-PHY HS/LP data lane transition timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Figure 39.
FT I/O input characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Figure 40.
I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Figure 41.
Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Figure 42.
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Figure 43.
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Figure 44.
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com